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    400 MHZ DIVIDE BY 10 Search Results

    400 MHZ DIVIDE BY 10 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74LS56P
    Rochester Electronics LLC 74LS56 - Frequency Dividers PDF Buy
    4022A/BEA
    Rochester Electronics LLC 4022A - Counter, Divide-By-8 - Dual marked (M38510/05604BEA) PDF Buy
    54LS92/BDA
    Rochester Electronics LLC 54LS92 - COUNTER, DIVIDE-BY-12 - Dual marked (M38510/31510BDA) PDF Buy
    4018B/BEA
    Rochester Electronics LLC 4018B - Counter, Divide-By-N - Dual marked (M38510/05652BEA) PDF Buy
    5492FM
    Rochester Electronics LLC 5492 - Divide By 12 Counter, Asynchronous, Up Direction, TTL, CDFP14 PDF Buy

    400 MHZ DIVIDE BY 10 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    6367 tube

    Abstract: PE3236 PE3501 PE3501-EK 03158
    Contextual Info: Product Specification PE3501 3500 MHz Low Power UltraCMOS Divide-by-2 Prescaler Product Description The PE3501 is a high-performance dynamic UltraCMOS™ prescaler with a fixed divide ratio of 2. Its operating frequency range is 400 MHz to 3.5 GHz. The PE3501 operates on a


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    PE3501 PE3501 6367 tube PE3236 PE3501-EK 03158 PDF

    Contextual Info: Product Specification PE83501 3.5 GHz Low Power UltraCMOS Product Description Divide-by-2 Prescaler The PE83501 is a high-performance dynamic UltraCMOS™ prescaler with a fixed divide ratio of 2. Its operating frequency range is 400 MHz to 3.5 GHz. The PE83501 operates on a


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    PE83501 PE83501 PDF

    PE83501-EK

    Abstract: PE3236 PE83501
    Contextual Info: Product Specification PE83501 3.5 GHz Low Power UltraCMOS Product Description Divide-by-2 Prescaler The PE83501 is a high-performance dynamic UltraCMOS™ prescaler with a fixed divide ratio of 2. Its operating frequency range is 400 MHz to 3.5 GHz. The PE83501 operates on a


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    PE83501 PE83501 PE83501-EK PE3236 PDF

    400 MHz DIVIDE BY 10

    Abstract: mc12080
    Contextual Info: MC12080 1.1 GHz Prescaler The MC12080 is a single modulus divide by 10, 20, 40, 80 prescaler for low power frequency division of a 1.1 GHz high frequency input signal. Divide ratio control inputs SW1, SW2 and SW3 select the required divide ratio of ÷10, ÷20, ÷40, or ÷80.


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    MC12080 MC12080 400 MHz DIVIDE BY 10 PDF

    Contextual Info: Freescale Semiconductor, Inc.Order this document by MC12080/D MC12080 The MC12080 is a single modulus divide by 10, 20, 40, 80 prescaler for low power frequency division of a 1.1 GHz high frequency input signal. Divide ratio control inputs SW1, SW2 and SW3 select the required divide


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    MC12080/D MC12080 MC12080 PDF

    400 MHz DIVIDE BY 10

    Abstract: MC12080 SW3 marking 12080 prescaler q 1257 MC12080D MC12080DR2 divide-by-10 mc12080 PRESCALER
    Contextual Info: MC12080 1.1 GHz Prescaler The MC12080 is a single modulus divide by 10, 20, 40, 80 prescaler for low power frequency division of a 1.1 GHz high frequency input signal. Divide ratio control inputs SW1, SW2 and SW3 select the required divide ratio of ÷10, ÷20, ÷40, or ÷80.


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    MC12080 MC12080 r14525 MC12080/D 400 MHz DIVIDE BY 10 SW3 marking 12080 prescaler q 1257 MC12080D MC12080DR2 divide-by-10 mc12080 PRESCALER PDF

    mc12080

    Contextual Info: MOTOROLA Order this document by MC12080/D SEMICONDUCTOR TECHNICAL DATA 1.1GHz Prescaler MC12080 The MC12080 is a single modulus divide by 10, 20, 40, 80 prescaler for low power frequency division of a 1.1GHz high frequency input signal. Divide ratio control inputs SW1, SW2 and SW3 select the required divide


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    MC12080/D MC12080 MC12080 MC12080/D* BR1334 PDF

    Contextual Info: M , +2/3 OR +2, +4/6) CLO CK GENERATIO N CHIP SYNERGY S E M IC O N D U C T O R FEATURES • ■ ■ ■ ■ ■ C'°S Y^0S838 Sy 10Qs83bl S Y 100S 838L DESCRIPTION 3.3V and 5V power supply options 50ps output-to-output skew Synchronous enable/disable Master Reset for synchronization


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    0S838 10Qs83bl 838/L SY100S838ZC SY100S838ZCTR SY100S838LZC SY1OOS838LZCTR Z20-1 PDF

    COC011

    Abstract: CY7B993V CY7B994V JESD22-A114 LCK4993V LCK4994 LCK4994V
    Contextual Info: a8e re AdLib OCR Evaluation systems Advance Data Sheet November 2002 LCK4993V/LCK4994V Low-Voltage PLL Clock Drivers Features Description . 12/100 MHz LCK4993V , or 24/200 MHz (LCK4994V) output operation The LCK4993V and LCK4994V low-voltage PLL clock drivers offer user-selectable control over


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    LCK4993V/LCK4994V LCK4993V) LCK4994V) LCK4993V LCK4994V DS02-346LCK COC011 CY7B993V CY7B994V JESD22-A114 LCK4994 PDF

    CY7B9945V

    Abstract: CY7B9945V-2AC CY7B9945V-2AI CY7B9945V-5AC CY7B9945V-5AI
    Contextual Info: 945V RoboClock II CY7B9945V High-Speed Multi-Phase PLL Clock Buffer Features Functional Description • 24–200 MHz output operation • Low output-output skew < 200 ps • 10 + 1 LVTTL 50% duty cycle outputs capable of driving 50Ω terminated lines • Dedicated feedback output


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    CY7B9945V CY7B9945V CY7B9945V-2AC CY7B9945V-2AI CY7B9945V-5AC CY7B9945V-5AI PDF

    MC12089

    Abstract: MC12089D
    Contextual Info: Order this document by MC12089/D MC12089 2.8 GHz Prescaler The MC12089 is a single modulus divide by 64 and 128 prescaler for low power frequency division of a 2.8 GHz high frequency input signal. The low power 10.2 mA typical at 5.0 V and high operating frequency features make


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    MC12089/D MC12089 MC12089 MC12089D PDF

    CY7B993V

    Abstract: CY7B993V-2AC CY7B994V CY7B994V-2AC CY7B994V-2BBC CY7B994V-2BBI
    Contextual Info: RoboClockII CY7B994V CY7B993V High-Speed Multi-Phase PLL Clock Buffer Features Functional Description • 12/100-MHz CY7B993V , or 24/200-MHz (CY7B994V) output operation • Matched pair output skew <200 ps • Zero input-to-output delay • 18 LVTTL 50% duty-cycle outputs capable of driving


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    CY7B994V CY7B993V 12/100-MHz CY7B993V) 24/200-MHz CY7B994V) CY7B993V CY7B993V-2AC CY7B994V CY7B994V-2AC CY7B994V-2BBC CY7B994V-2BBI PDF

    MC100E016

    Abstract: MC10E016 MC10H016 mc10E106 MC10E016FNG
    Contextual Info: MC10E016, MC100E016 5.0 V ECL 8−Bit Synchronous Binary Up Counter Description http://onsemi.com The MC10E/100E016 is a high−speed synchronous, presettable, cascadable 8−bit binary counter. Architecture and operation are the same as the MC10H016 in the MECL 10H family, extended to


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    MC10E016, MC100E016 MC10E/100E016 MC10H016 10HTM MC10E106/D MC100E016 MC10E016 mc10E106 MC10E016FNG PDF

    CY7B993V

    Abstract: CY7B993V-2AC CY7B993V-2AI CY7B994V CY7B994V-2AC
    Contextual Info: RoboClock CY7B994V CY7B993V High-speed Multi-phase PLL Clock Buffer Features • 500ps max Total Timing Budget TTB™ window • 12 MHz/100 MHz (CY7B993V), or 24 MHz/200 MHz (CY7B994V) output operation • Matched pair output skew < 200 ps • Zero input-to-output delay


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    CY7B994V CY7B993V 500ps Hz/100 CY7B993V) Hz/200 CY7B994V) 200MHz: CY7B993V CY7B993V-2AC CY7B993V-2AI CY7B994V CY7B994V-2AC PDF

    30374

    Abstract: TN4-30377 30377 AV9110-01 TN4-30376 AV9110 AV9110-02 MA-505
    Contextual Info: AV9110 Integrated Circuit Systems, Inc. Serially Programmable Frequency Generator General Description Features The AV9110 generates user specified clock frequencies using an externally generated input reference, such as 14.318 MHz or 10.00 MHz crystal connected between pins 1 and 14. Alternately, a TTL input reference clock signal can be used. The


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    AV9110 AV9110 24-bit AV9110-01CN14, AV9110-02CN14 AV9110-01CS14, AV9110-02CS14 30374 TN4-30377 30377 AV9110-01 TN4-30376 AV9110-02 MA-505 PDF

    SY10E016

    Abstract: MC10H016 SY100E016
    Contextual Info: 8-BIT SYNCHRONOUS BINARY UP COUNTER SY10E016 SY100E016 DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ The SY10/100E016 are high-speed synchronous, presettable and cascadable 8-bit binary counters designed for use in new, high-performance ECL systems. Architecture


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    SY10E016 SY100E016 SY10/100E016 MC10H016 J28-1 SY10E016JC SY10E016JCTR SY100E016JC SY10E016 SY100E016 PDF

    SY10E016

    Contextual Info: SY10E016 SY100E016 FINAL 8-BIT SYNCHRONOUS BINARY UP COUNTER DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ The SY10/100E016 are high-speed synchronous, presettable and cascadable 8-bit binary counters designed for use in new, high-performance ECL systems. Architecture


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    SY10E016 SY100E016 SY10/100E016 MC10H016 J28-1 SY10E016JC SY10E016JCTR SY100E016JC SY10E016 PDF

    DRIVER 30374

    Contextual Info: AV9110 Integrated Circuit Systems, Inc. Serially Programmable Frequency Generator General Description Features The AV9110 generates user specified clock frequencies using an externally generated input reference, such as 14.318 MHz or 10.00 MHz crystal connected between pins 1 and 14. Alter­


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    AV9110 AV9110 24-bit AV9110-01CN14, AV9110-02CN14 AV9110-01CS14, AV9110-02CS14 DRIVER 30374 PDF

    Contextual Info: AV9110 Integrateci Circuit Systems, Inc. Serially Programmable Frequency Generator General Description Features The AV9110 generates user specified clock frequencies using an externally generated input reference, such as 14.318 MHz or 10.00 MHz crystal connected between pins 1 and 14.


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    AV9110 AV9110 24-bit AV9110-01CN14, AV9110-02CN14 AV9110-01CS14, AV9110-02CS14 PDF

    HMC860LP3E

    Contextual Info: HMC905LP3E v00.0310 6 GHz LOW NOISE PROGRAMMABLE DIVIDER N = 1 to 4 FREQUENCY DIVIDERS & DETECTORS - SMT 4 Typical Applications Features The HMC905LP3E is ideal for: Low Noise Floor: -164 dBc/Hz at 10 MHz Offset for N = 4 • LO Generation with Low Noise Floor


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    HMC905LP3E HMC905LP3E HMC860LP3E PDF

    TN4-30377

    Abstract: AV9110 AV9110-02 CA-301 MA-505 MA-506 30374 CA301
    Contextual Info: AV9110 Integrated Circuit Systems, Inc. Serially Programmable Frequency Generator General Description Features The AV9110 generates user specified clock frequencies using an externally generated input reference, such as 14.318 MHz or 10.00 MHz crystal connected between pins 1 and 14.


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    AV9110 AV9110 24-bit 14-Pin AV9110-01CN14, AV9110-02CN14 AV9110-01CS14, TN4-30377 AV9110-02 CA-301 MA-505 MA-506 30374 CA301 PDF

    AV9110-02

    Abstract: 30374 AV9110 CA-301 MA-505 MA-506 AV9110-02CS14LF 30377
    Contextual Info: AV9110 Integrated Circuit Systems, Inc. Serially Programmable Frequency Generator General Description Features The AV9110 generates user specified clock frequencies using an externally generated input reference, such as 14.318 MHz or 10.00 MHz crystal connected between pins 1 and 14.


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    AV9110 AV9110 24-bit Phase01CS14LF, AV9110-02CS14LF AV9110-02 30374 CA-301 MA-505 MA-506 AV9110-02CS14LF 30377 PDF

    CY7B993V

    Abstract: CY7B994V
    Contextual Info: RoboClock, CY7B994V CY7B993V PRELIMINARY High-Speed Multi-Phase PLL Clock Buffer Features Functional Description • 12/100-MHz CY7B993V , or 24/185-MHz (CY7B994V) output operation • Matched pair outputs skew <200 ps • Zero input-to-output delay • 18 LVTTL 50% duty-cycle outputs capable of driving


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    CY7B994V CY7B993V 12/100-MHz CY7B993V) 24/185-MHz CY7B994V) CY7B993V CY7B994V PDF

    Contextual Info: Freescale Semiconductor, Inc.Order this document by MC12181/D MC12181 ARCHIVED฀BY฀FREESCALE฀SEMICONDUCTOR,฀INC.฀2005 125-1000 MHz Frequency Synthesizer • • • • • • • 125 – 1000 MHZ FREQUENCY SYNTHESIZER SEMICONDUCTOR TECHNICAL DATA


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    MC12181/D MC12181 MC12181 PDF