4-BIT SWITCH TALE COUNTER Search Results

ADC 812

Abstract: Manuale Tecnico schema rs 232 potenziometri multimetro schema controllo pwm 80c320 nel d3 NUOVA COI condensatori schema elettrico
Contextual Info: ADC 812 Analog to Digital Converter 8 canali 12 bits MANUALE TECNICO Via dell' Artigiano, 8/6 40016 San Giorgio di Piano grifo Bologna ITALY E-mail: grifo@grifo.it http://www.grifo.it http://www.grifo.com Tel. +39 051 892.052 (r.a.) FAX: +39 051 893.661

akd4324

Abstract: JP15 AKD4321 AK4516 jp13 cs8402
Contextual Info: ASAHI KASEI [AKD4516] AKD4516 Evaluation board Rev.A for AK4516 General description AKD4516 is an evaluation board for the digital stereo audio 16bit AID and D/A converter, AK4516. The A/D converter section includes the MIC circuit, the D/A converter section includes the 2nd order LPF. The

GPC® 150

Abstract: Manuale Tecnico GPC®-150 DISPLAY alfanumerico schema Lcd monitor dell schema elettrico auto zilog z80 microprocessor family 4 LT 16 Futaba display dell motherboard schematic memoria 128k x 8
Contextual Info: GPC 150 General Purpose Controller Z84C15 MANUALE TECNICO Via dell' Artigiano, 8/6 ® 40016 San Giorgio di Piano grifo Bologna ITALY E-mail: grifo@grifo.it http://www.grifo.it http://www.grifo.com Tel. +39 051 892.052 (r.a.) FAX: +39 051 893.661 ® GPC 150

MB86611A

Abstract: 100-PIN P1394 S100
Contextual Info: February 1998 Edition 2.0 - PRELIMINARY DATA SHEET MB86611A IEEE 1394 Serial Bus Controller DV - over - 1394 DESCRIPTION Fujitsu MB86611A is a high performance 1394 Serial Bus Controller LSI conforming to IEEE1394 standard draft (P1394; Rev.8.0 ver. 2). This controller LSI has two cable ports

GMM AM08

Abstract: Manuale Tecnico BIBLIOGRAFIA In-System Programming bascom avr keyboard 4X4 com1 pony prog lcd 20x2 schema rs 232 program bascom avr
Contextual Info: GMM AM08 grifo Mini Modulo AT mega 8L MANUALE TECNICO Via dell' Artigiano, 8/6 ® 40016 San Giorgio di Piano grifo Bologna ITALY E-mail: grifo@grifo.it http://www.grifo.it http://www.grifo.com Tel. +39 051 892.052 (r.a.) FAX: +39 051 893.661 ITALIAN TECHNOLOGY

Contextual Info: SL- 11 USB Cont rol l er Technical Reference OVERVIEW FEATURES The SL-11 USB Controller is a single chip USB peripheral device solution that enables interfacing to devices such as microprocessors and scanners. The SL11 USB Controller incorporates USB Serial Interface

8051 stepper motor interfacing

Abstract: stepper motor interface with 8051 block diagram stepper motor interface with 8051 stepper motor with 8051 dc motor interface with 8051 5-phase drive STEPPER MOTOR 5-phase BIPOLAR STEPPER MOTOR 5-phase microstepping 8051 PROGRAM C step motor stepper motor interfacing with 8051
Contextual Info: 1 TMC453 DATASHEET V2.3 DATASHEET TMC453 STEP_OUT CHN CHA CHB NSTOPL NSTOPR NSLDL NSLDR VCC4 GND4 CLKIN RAMP_SQUARE TEST_SE DIR_IN STEP_IN SYNCIN SYNCOUT TRINAMIC MOTION CONTROL CHIP NRES DIR_OUT ALE GND5 NOE VCC5 NCS STO9 AD0 STO8 AD1 STO7 AD2 STO6 AD3 STO5

Contextual Info: STC5423 Synchronous Clock for SETS Data sheet Description Features The RoHS 6/6 compliant STC5423 is a single chip clock synchronization solution for applications in SDH/SETS, SONET, and Synchronous Ethernet network elements. The device is fully compliant with ITU-T G.813 option 1 and 2,

Contextual Info: STC5423 Synchronous Clock for SETS Data sheet Description Features The RoHS 6/6 compliant STC5423 is a single chip clock synchronization solution for applications in SDH/SETS, SONET, and Synchronous Ethernet network elements. The device is fully compliant with ITU-T G.813 option 1 and 2,

TMC453

Abstract: CHN 632 5-phase microstepping chn 731 8051 stepper motor interfacing CHN 633 5-phase drive STEPPER MOTOR stepper motor interface with 8051 chn 732 stepper motor interface with 8051 block diagram
Contextual Info: 1 TMC453 DATASHEET V2.3 DATASHEET TMC453 STEP_OUT CHN CHA CHB NSTOPL NSTOPR NSLDL NSLDR VCC4 GND4 CLKIN RAMP_SQUARE TEST_SE DIR_IN STEP_IN SYNCIN SYNCOUT TRINAMIC MOTION CONTROL CHIP NRES DIR_OUT ALE GND5 NOE VCC5 NCS STO9 AD0 STO8 AD1 STO7 AD2 STO6 AD3 STO5

tm114

Contextual Info: STC5423 Synchronous Clock for SETS Data sheet Description Features The RoHS 6/6 compliant STC5423 is a single chip clock synchronization solution for applications in SDH/SETS, SONET, and Synchronous Ethernet network elements. The device is fully compliant with ITU-T G.813 option 1 and 2,

WJ-A70

Abstract: Q193
Contextual Info: Order this document by AR563/D AR563 Active SCSI terminators confront critics and gain acceptance Prepared by: Lance K. Packer operation, SCSI allows no more than 14 lines to be low at once, and the duty cycle of the control lines except BSY is less than 10%. Table 1 shows the possible simultaneous

Contextual Info: STC5423 Synchronous Clock for SETS Data sheet Description Features The RoHS 6/6 compliant STC5423 is a single chip clock synchronization solution for applications in SDH/SETS, SONET, and Synchronous Ethernet network elements. The device is fully compliant with ITU-T G.813 option 1 and 2,

intel 8096

Abstract: STR 11006 SC11011CV intel 8096 instruction set 8096 instruction set SC11061 A5 MCR 100-6 temperature control of 8096 Savoy Electronics mcr 100-6 A26
Contextual Info: A SIERRA SEMICONDUCTOR SC11061 2400 bps Fast Modem Advanced Controller FMAC □ V.22 bis, V.22, V.21, 212A □ □ □ □ and 103 standards Direct interface to SC11006/024 Pow erful enough to handle M N P5 as w ell as H ayes commands & DSP Built-in UART

Contextual Info: SPEAr310 Embedded MPU with ARM926 core, flexible memory support, extended set of powerful connectivity features Features • ARM926EJ-S 333 MHz core ■ High-performance 8-channel DMA ■ Dynamic power-saving features ■ Configurable peripheral functions multiplexed

Contextual Info: STC5420 Synchronous Clock for SETS Data sheet Description Features The RoHS 6/6 compliant STC5420 is a single chip clock synchronization solution for applications in SDH/SETS, SONET, and Synchronous Ethernet network elements. The device is fully compliant with ITU-T G.813 option 1 and 2,

history of automatic phase selector

Contextual Info: STC5420 Synchronous Clock for SETS Data sheet Description Features The RoHS 6/6 compliant STC5420 is a single chip clock synchronization solution for applications in SDH/SETS, SONET, and Synchronous Ethernet network elements. The device is fully compliant with ITU-T G.813 option 1 and 2,

lpddr3

Abstract: M25Pxxx SPEAR310 d1577
Contextual Info: SPEAr310 Embedded MPU with ARM926 core, flexible memory support, extended set of powerful connectivity features Features • ARM926EJ-S 333 MHz core ■ High-performance 8-channel DMA ■ Dynamic power-saving features ■ Configurable peripheral functions multiplexed

Contextual Info: STC5420 Synchronous Clock for SETS Data sheet Description Features The RoHS 6/6 compliant STC5420 is a single chip clock synchronization solution for applications in SDH/SETS, SONET, and Synchronous Ethernet network elements. The device is fully compliant with ITU-T G.813 option 1 and 2,

intel 8096

Abstract: intel 8096 instruction set SC11011CV SC11046 8096 instruction set national semiconductor 8250, uart 8096 instruction SC11011 sc11018 8096 processor architecture
Contextual Info: SIERRA SEMICONDUCTOR CORP SHZ D • Ö542G10 D001fi7b 547 " T -7 S -^ ^ 0 SCU011 2400 bps Modem Advanced Controller MAC SIERRA SEMICONDUCTOR 68-PIN PLCC PACKAGE □ Direct IBM PC bus interface □ External ROM /RAM address­ able for application flexibility

Contextual Info: Column #19: Connect the BS2-IC to Phone Lines, Give the BS1-IC an LED Display Column #19, September 1996 by Scott Edwards: Connect BS2 to Phone Lines, Give the BS1 an LED Display Project double-header for the BASIC Stamps I and II THIS MONTH we’re going to blast our way through two frequently requested

Contextual Info: SIERRA SEMICONDUCTOR SC11061 2400 bps Fast Modem Advanced Controller FMAC □ Performs 1 6 x 1 6 multiply in 2.2 |isec. □ F irm w are co m p a tib le w ith SC11011CV □ CMOS technology □ 8k x 8 Internal ROM available for custom applications G E N E R A L D E S C R IP T IO N

intel 8096

Abstract: SC11013 STR 11006 sc11011cv SC11046 74LS04W UART national 8250 8250 uart intel 8096 processor architecture intel 8096 instruction set
Contextual Info: SCllOU 2400 bps Modem Advanced Controller MAC SIERRA SEMICONDUCTOR 68-PIN PLCC PACKAGE □ V .22 bis, V .22, V.21, 212A and 103 standards □ Direct interface to S C I 1006/024 □ C om plete "A T " com m and set available in firm w are □ Built-in U ART

LFBGA289

Abstract: ARM926 ARM926EJ-S CRC16 M95010 M95020 M95040 SPEAR320-2
Contextual Info: SPEAr320 Embedded MPU with ARM926 core, optimized for factory automation and consumer applications Features • ARM926EJ-S 333 MHz core ■ High-performance 8-channel DMA ■ Dynamic power-saving features ■ Configurable peripheral functions on 102 shared I/Os.