390S2 Search Results

LM373

Abstract: MC1303L LM566 "direct replacement" transistor BD 540 LYS MFC6030 LM566 equivalent LM3039 SN72558P LM370 SN72741P
Contextual Info: Edge Index by Product Family Here is the new Linear Data Handbook from National. It gives complete specifications for devices useful in building nearly all types of electronic systems, from communica­ tions and consumer-oriented circuits to precision instrumentation and computer designs.

isplsi device layout

Contextual Info: LATTICE SEMICONDUCTOR Lattice bö E » • SBÖb^MT 4Ô0 » L A T p L S r and ispLSI ' 1024 High-Density Programmable Logic Features Functional Block Diagram • PROGRAMMABLE AND IN-SYSTEM PROGRAMMABLE HIGH DENSITY LOGIC — High-Speed Global Interconnect

TTL 74-series IC

Abstract: IC 7493n FJJ14 TTL 7490 7401 ic configuration ic 7490n 7400N 7401N 7402N 7403AN
Contextual Info: INTEGRATED CIRCUITS LIST OF COMPARABLE TYPES T T L RANGE COMMERCIAL VERSIONS Type No. 7400N 7401N 7401 AN 7402N 7403N 7403AN 7404N 7405N 7405AN 741 ON 7420N 7430N 7440N 7441 AN 7442N 7450N 7451N 7453N Mullard types Type No. Mullard types FJH131 FJH231 FJH311

DM8837N

Abstract: DM8837 om88 DM7837J DM7837W DM8837J DM8837W 5v input 4v output DM7837
Contextual Info: Line D rivers/R eceivers hex unified bus receiver g en eral description fe a tu re s The D M 7 8 3 7 /D M 8 8 3 7 are high speed receivers de­ signed fo r use in bus organized data transm ission systems in te rc o n n e c te d b y te rm in a te d im ­ pedance lines. T h e e xte rn a l te rm in a tio n is in te n d ­

Contextual Info: «P° «S 199? 1032 pLSI Lattine V i &« I w W programmable Large Sea Scale Integration Features Functional Block Diagram • PROGRAMMABLE HIGH DENSITY LOGIC — — — — — Member of Lattice’s pLSI Family High Speed Global Interconnects 64 I/O Pins, Eight Dedicated Inputs

universal laptop schematic power supply circuit diagram

Abstract: P3C18V8Z35A P3C18V8Z35FA P3C18V8Z35N
Contextual Info: P3C18V8Z35/P3C18V8ZI 42T 3 VOlt Ze S .'? "db! 'pOWer universal PAL devices SIC3 Product specification • Philips Semiconductors Programmable Logie Devices All the P3C18V8Z devices are available in plastic DIP, PLCC and Plastic Small Outline SOL packages. A ceramic DIP with a

Contextual Info: Lattice H i Corporation^^ ispLSI 8840 In-System Programmable SuperBIG High Density PLD • ispEXPERT™ - LOGIC COMPILER AND COMPLETE ISP DEVICE DESIGN SYSTEMS FROM HDL SYNTHESIS THROUGH IN-SYSTEM PROGRAMMING — Superior Quality of Results — Tightly Integrated with Leading CAE Vendor Tools

Contextual Info: Latti C6 ' Semiconductor ¡Corporation ispLSI 1032E _ In-System Programmable High Density PLD Features Functional Block Diagram • HIGH DENSITY PROGRAMMABLE LOGIC — 6000 PLD Gates — 64 I/O Pins, Eight Dedicated Inputs — 192 Registers — High Speed Global Interconnect

RCA-40841

Abstract: A3060 rca CA3080
Contextual Info: ional Amplifiers Î Ï ! H A R R IS CA3060 A pplications: • Low p o w e r co nsu m p tio n - as lo w as 100 m W p e r am plifier u Independent bia sin g fo r each am plifier m High fo rw ard tra n sco nd u cta n ce u P rogram m able range o f in p u t ch ara cteristics

S2559A

Abstract: S2559C S2559E plotter hp S2559B hp plotter 3580A 2559E
Contextual Info: AMI A S ub sid iary o f G ould Inc. S2559A/B/E/F DTMF TONE GENERATOR Features □ W ide Operating Supply Voltage Range: 3.5 to 13.0 Volts A,B 2.5 to 10 Volts (E,F) □ Low Power CMOS Circuitry A llow s Device Power to be Derived Directly from the Telephone Lines or

D1133

Abstract: transistor D1133 EQUIVALENT number transistor D1133 EQUIVALENT CIRCUIT transistor D1133 7405AN D1133 EQUIVALENT CIRCUIT truth table inverter gate 74 Inverter Gates FJH321 FJH321A
Contextual Info: T.T.L. SEXTUPLE SINGLE INPUT INVERTER GATES FIH 3 2 I FJH3 2 IA Corresponds to 74 Series type 7405AIM P R O V IS IO N A L D A T A These d evices are transistor-transistor logic sextuple single-input inverter gates, with a single-ended open collector output transistor, in the FJ s e r ie s of integrated

LM75108AN

Abstract: LM163J 55107 LM75107AN LM75107AJ lm5610 LM363N LM55107 LM363AN LM75108
Contextual Info: LM55107A/LM55108A S eries LVIS Line Drivers/Receivers LM 55 1 0 7A /LM 7 5 1 07 A , LM 55108 A / LM 7 5 1 0 8 A, L M 1 6 3 / L M 3 6 3 d u a l line r e c e iv e r s L M 7 5 2 0 7 .L M 7 5 2 0 8 , L M 3 6 3 A dual M O S sense a m p l if i e r s fe a t u re s

7405N

Abstract: pin diagram for all 74 series ttl gates truth table inverter gate 74 FJH251 "Inverter Gates" 4000 series logic gate Inverter Gates FJH251A 2 input and gate 24v or gate 24v output
Contextual Info: T .T .L . S E X T U P L E S IN G L E IN P U T IN V E R T E R G A T E S F IH 2 5 I F J H 2 5 IA Corresponds to 74 Series type 7405N TEN TA TIV E DATA T h e s e d e v ic e s a r e t r a n s i s t o r - t r a n s i s t o r lo g ic s e x tu p le s in g le - in p u t in v e r t e r g a te s ,

Z80-CTC

Abstract: Z0843004
Contextual Info: ^ 2 LG b Product Specification Z8430/Z84C30 NMOS/CMOS Z80 CTC Counter/Timer Circuit FEATURES • Four independently program m able counter/tim er channels, each with a readable downcounter and a selectable 16 or 256 prescaler. Downcounters are reloaded automatically at zero count.

SM22

Abstract: V18SM16 V22SM16 V27SM16 V33SM16 220S1
Contextual Info: G E SOLID STATE Ôï DeT| 3Û750Ô1 _ □ D l t e]40 3 l~~ T'N -l 5 SURFACE-MOUNT VARISTORS SM SERIES Cont’d RATINGS AND CHARACTERISTICS TABLE: SM16 SERIES (Equivalent to 14mm Radial) SM 16 (io x 16mm), SM22 (14 x 22mm) Maximum Ratings (8S°C) Continuous

MC5479

Abstract: 30035 M38510 j1 3009
Contextual Info: M IL -M -3 8 5 1 0 /2 E 24 D e c e m b e r 1974 _ _ SUPERSEDING M IL -M -0038510/2D U S A F 15 O c to b e r 1973 an d M IL -M -3 8 5 1 0 /2 C 7 N o v em b e r 1972 M ILITA RY SPECIFICA TIO N M ICROCIRCUITS, DIGITAL, T T L , F L IP -F L O P S , MONOLITHIC SILICON

IC gal16v8

Abstract: CAL16V8 EZ314 cal16v8b 6V8 equivalent 16V8B 16L8* GAL IC GAL 16V8B-15
Contextual Info: GAL16V8 Lattice High Performance E2CMOS PLD Generic Array Logic Semiconductor Corporation FUNCTIONAL BLOCK DIAGRAM FEATURES >HIGH PERFORMANCE E2CMOS TECHNOLOGY — 3.5 ns Maximum Propagation Delay — Fmax = 250 MHz — 3.0 ns Maximum from Clock Input to Data Output

LM75108

Contextual Info: LM55107A/LM75107A, LM 55108A/LM75108A, LM163/LM363.LM75207.LM75208.LM363A Interface Circuits LYS LM 55107A/LM 75107A , LM 55108 A /LM 75108A , LM 163/LM 363 dual line receivers L M 7 5 2 0 7 ,L M 7 5 2 0 8 ,L M 3 6 3 A dual M O S sense am plifiers features

transistor D1133 EQUIVALENT number

Abstract: D1133 transistor D1133 EQUIVALENT CIRCUIT TTL 74-series IC LIST D1133 transistor IC 7493n and pin diagram of IC 7491 transistor D1133 TTL 74-series IC Inverter Gates
Contextual Info: INTEGRATED CIRCUITS LIST OF COMPARABLE TYPES T T L RANGE COMMERCIAL VERSIONS Type No. 7400N 7401N 7401 AN 7402N 7403N 7403AN 7404N 7405N 7405AN 741 ON 7420N 7430N 7440N 7441 AN 7442N 7450N 7451N 7453N Mullard types Type No. Mullard types FJH131 FJH231 FJH311

7405N

Abstract: Inverter Gates 7400N 7401N 7402N 7403AN 7403N 7404N 7405AN 7420N
Contextual Info: IN TEG RATED C IR C U IT S LIST OF C O M P A R A B L E TYPES T T L RANGE COMMERCIAL VERSIONS Type No. 7400N 7401N 7401 AN 7402N 7403N 7403AN 7404N 7405N 7405AN 741 ON 7420N 7430N 7440N 7441 A N 7442N 7450N 7451N 7453N Mullard types FJH131 FJH231 FJH311 FJH221

CSB503F2

Contextual Info: 8T5UM8 Sync Detector MM 1069 Monolithic IC MM1069 This IC is a sync detection circuit for obtaining the best reception state on VCR and TV channel selection systems. A system with high detection precision and no adjustment required can be configured due to the

Contextual Info: Philips C o m p o n e n ts -S ig n e tic s D o c u m e n t No. 8 5 3 -0 9 3 4 MC1489/MC1489A E C N No. 91023 Quad line receivers D a te o f Issu e O c to b e r 2 0, 1987 S ta tu s P ro d u c t S p e c ific a tio n Data Com m unication Products PIN CONFIGURATION

Contextual Info: Lattice G A L 2 2 V 1 0 /8 8 3 High Performance E2CMOS PLD Generic Array Logic ; Semiconductor I Corporation FUNCTIO N AL B LO C K DIAGRAM FEATURES • HIGH PERFORMANCE E ^M O S TECHNOLOG Y — 10 ns Maxim um Propagation Delay — Fmax = 1 6 6 MHz — 7ns Maximum from Clock Input to Data O utput

Contextual Info: pLSÌ 1048 Lattice programmable Large Scale Integration High-Density Programmable Logic Functional Block Diagram Features PROGRAMMABLE HIGH-DENSITY LOGIC ^n_mgjxu=LU=U=! u ijj_ n iijj_ u =ü_Q=n3 Output Routing Pool ] [ Output Routing Pool — — — —