386 EISA Search Results

487SX

Abstract: OPTi-486WB v 1.1 82c681 opti 486 chipset
Contextual Info: i 199? OPTi-386/486WB EISA Chipset 82C681/82C682/82C686/82C687 EBC/MCC/1SP/DBC DATABOOK Preliminary Version 1.3 t OPTÏ-386/486WB EISA DATABOOK Version 1.3 PRELIMINARY Disclaimer This specification is subject to change without notice. OPTi, Incorporated assumes no

POWER COMMAND HM 1300

Abstract: 82358
Contextual Info: inteT 82358 Pm ORM M SV 1.0 INTRODUCTION interface unit takes advantage of the 386 address pipelining capabilities for 386 systems. 1.1 EBC System Architecture Overview There is a special protocol using the host bus signal HSTRETCH#, which enables BCLK low time to be

GT1 X02

Abstract: SiS chipset 486 82c681 ram 2112 SIS chipset for 486 opti 486 chipset 82C631 80487SX HD3112 sd338
Contextual Info: i »9? OPTÎ-386/486WB EISA Chipset 82C681/82C682/82C686/82C687 EBC/MCC/ISP/DBC D A T A B O O K Preliminary Version 1.3 / Powered by ICminer.com Electronic-Library Service CopyRight 2003 OPTÏ-386/486WB EISA DATABOOK PRELIMINARY Version 1.3 Disclaimer This specification is subject to change without notice. OPTi, Incorporated assumes no

GIGABYTE G41

Abstract: 82360SL intel 82360SL
Contextual Info: INTEL CORP UP/PRPHLS 3IE D 402tl7S 00aSbb7 2 int@l 7 = V f-/7 -^ 2 386TM SL MICROPROCESSOR SuperSet Highly-Integrated Static 386 Microprocessor Complete ISA Peripheral Subsystem System-Wide Power Management Static 386™ CPU Core — Runs MS-DOS*, WINDOWS*, O S/2*

80487

Abstract: 80487SX 486 system bus weitek pin diagram of 80487 symphony chipset 386DX motherboard CACHE MEMORY FOR 80386DX 80387 dram controller
Contextual Info: SL82C470 SYMPHONY LABORATORIES 3EC 1 3 991 SL82C470 486/386 EISA CHIPSET SL82C471 Cache/DRAM Controller SL82C472 EISA Bus Controller SL82C473 DMA Controller 100% EISA com patible * Supports both conventional and concurrent configurations 20/25/33/50 M Hz 80486 DX/SX CPU operation

486sl

Abstract: 82078
Contextual Info: 82078 44 PIN 8.0 COMPATIBILITY 8.2 Drive Polling The 82078 was designed with software compatibility in mind. It is a fully backwards compatible solution with the older generation 8272A and NEC765A/B disk controllers. It is fully compatible with Intel’s 386/486SL Microprocessor Superset.

PICMASTER

Abstract: floppy drive emulator INHX16 PICMASTER-17B PIC16C54 PIC16C54A PICMASTER-16G PIC16C56 PIC16C57 PIC16C61
Contextual Info: PICMASTER System Universal In-Circuit Emulator System with MPLAB IDE SYSTEM FEATURES General: • Complete Hi-Performance PC-based Microcontroller Development System for the PIC16/17 families. • For use on PC-compatible 386, 486 and Pentium machines under Microsoft Windows 3.X

HS488

Abstract: NAT4882 TNT4882C
Contextual Info: Combination GPIB Controller/Analyzer for ISA AT-GPIB/TNT+ Features AT-GPIB/TNT+ Processor PC AT ISA , Plug and Play ISA Intel 386 or higher, math coprocessor required Overview The AT-GPIB/TNT+ combines the functionality of the AT-GPIB/TNT (Plug and Play) IEEE 488.2 Controller

HC SR04

Abstract: lcm-5331-22ntk toshiba Notebook lcd inverter schematic schematic LG TV lcd backlight inverter NEC plasma tv schematic diagram lcd power board schematic lg yp LCM-5327-24NAK mod 8 using jk flipflop NEC J330 lcd backlight inverter schema
Contextual Info: Introduction 65535 High Performance Flat Panel / CRT VGA Controller • Highly Integrated Design Flat Panel/CRT Controller, RAMDAC, Clock Synthesizer, non­ multiplexed bus, direct panel drive ■ Integrated Interface for Multiple Bus Architec­ tures • Local Bus (32-bit 386/486 or 16-bit 386SX)

toshiba lcd inverter pinout

Abstract: lm- ch 53 -22ntk NEC plasma tv schematic diagram LM-CK53-22NEZ LM64C031 NEC J330 LCM-5327-24NAK schematic diagram crt tv sharp LCD 640X200 OPTREX color tv pattern generator ep 485 schematic diagram
Contextual Info: Introduction 65535 High Performance Flat Panel / CRT VGA Controller • Highly Integrated Design Flat Panel/CRT Controller, RAMDAC, Clock Synthesizer, non­ multiplexed bus, direct panel drive ■ Integrated Interface for Multiple Bus Architec­ tures • Local Bus (32-bit 386/486 or 16-bit 386SX)

PICMASTER

Abstract: PICMASTER-16G E16-D INHX16 PIC16C54 PIC16C54A PIC16C55 PIC16C56 PIC16C57 PIC16C61
Contextual Info: $ M ic r o c h ip PICMASTER System PICMASTER Universal In-Circuit Emulator System SYSTEM FEATURES General: • Complete Hi-Performance PC-based Microcon­ troller Development System for the PIC16/17 families. • For Use on PC-compatible 386, and 486 machines under Microsoft® Windows 3 .X envi­

82385

Abstract: 82358 intel 82358 intel 82350 82350 intel 82385 29025 intel 82357
Contextual Info: PGmOMOIMßäV intei 82358 EISA BUS CONTROLLER EBC Supports 8-, 16-, or 32-Bit DMA Cycles — Type A, B, or C (Burst) Cycles — Compatible Cycles Provides EISA/ISA Bus Cycle Compatibility — EISA/ISA Standard Memory or I/O Cycle — EISA/ISA Wait State Cycles

82385

Abstract: 82350DT 82359 82350 82358 intel 82350 intel 80386 bus architecture 82395 82358DT intel 82358
Contextual Info: in t e i 82358DT EISA BUS CONTROLLER Supports 8-, 16-, or 32-bit DMA Cycles — Type A, B, or C Burst Cycles — Compatible Cycles Supports 82350 and 82350DT Chip Set Based Systems — Mode Selectable for Either 82350 or 82350DT Based Systems — Mode Defaults to 82350 Based

intel 82350

Abstract: architecture of 80486 microprocessor EISA chip set isa bus master 386 intel 8742 intel 82357 intel 82352 82352 intel 82358
Contextual Info: 82350 will need to run four cycles to the 8-bit slave and route the bytes to appropriate byte lanes EISA TERMINOLOGY ISA BU S— The bus used in Industry Standard Archi­ tecture compatible computers. In the context of an E IS A system, it refers to the ISA subset of the E IS A

intel 82350

Abstract: intel 82352 82351 eisa intel 82357 intel 82358 82359 82350DT EISA Chip Set Design Guide 2LF 1418 82350DT
Contextual Info: in te i 82358DT EISA Bus Controller • Supports 82350 and 82350DT Chip Set Based Systems — Mode Selectable for Either 82350 or 82350DT Based Systems — Mode Defaults to 82350 Based Systems ■ Socket Compatible with the 82358 EISA Bus Controller ■ Provides EISA/ISA Bus Cycle

led 7 segment LDS 5161 AK

Abstract: led 7 segment LDS 5161 AH 7-segment 4 digit LFD 5522 AKO 701 434 tdso 5160 k lds 7 segment LDS 5161 AK led 7 segment LDS 5161 As manual LG VARIABLE FREQUENCY DRIVE is3 -20/led 7 segment LDS 5161 AH ako 544 126
Contextual Info: NAM E; C O M P A N Y :. ADDRESS; . . C IT Y ; S TA TE: Z IP : C O U N T R Y :. P H O N E N O .; . .I — ;.-,. ' - V- ORDER NO. QTY. TITLE fTTT ±j . • . n i i lU . . II 11 1 i i 1111 1-T 2 .-.

EDIT BIOS

Abstract: PC BIOS extension intel386 award Flash BIOS IBM386
Contextual Info: BIOS AWARD SOFTWARE INTERNATIONAL, INC. Award BIOS • ■ ■ ■ ■ ■ ■ ■ ■ Supports Most Standard Chipsets BUS Support For ISA, EISA & PCI ATAPI CD-ROM Support Enhanced IDE Drive Support LBA Mode Transfers 3 Parallel/4 Serial Ports Compression Services

Contextual Info: PIE5@ y T [p[^E¥00 in te l Military lntel386TM EX EMBEDDED MICROPROCESSOR • Static Intel386 CPU Core — Low Power Consumption — 5V ± 5% Operating Power Supply — 25 MHz Operating Frequency Large Uniform Address Space — 64 Megabyte Physical — 64 Terabyte Virtual

Contextual Info: H •r INI t l L - NEC Electronics Inc. ARC Chip Sot c/o MCT-ADR Address Path Controller and MCT-DP Data Path Controller July 1993 Description The ARC chip set operates in a high-performance computer system based on NEC’s VR4000-family of 64-bit RISC microprocessors VR4000 , VR4400™, and

arc risc

Abstract: Arc chip
Contextual Info: N E C ^ ELECTRONICS INC faIE D • ^457525 0Q3Sfa41 ST7 ■ NECE ARC Chip Set c/o MCT-ADR Address Path Controller and MCT-DP Data Path Controller IMEC NEC Electronics Inc. _ Description The ARC chip set operates in a high-performance

EISA Bus

Abstract: forerunner atm crc 10 in atm Scatter-Gather 486 processor types
Contextual Info: ATM FORE SYSTEMS ForeRunner ESA-200EPC EISA Bus ATM Adapter TECHNICAL SPECIFICATIONS Operating Systems • Windows NT 3.5 or 3.51 ■ Novell Netware 3.12 or 4.x Servers Only PC Types ■ Any Fully-Compliant Extended Industry Standard Architecture (EISA) Specification PC or Server

wd90c30

Abstract: WD90C31 vlsi 386sx WD7600 WD90C56 72A3 ad6v intel 486 dx 33mhz wd90c3 TLE 7233
Contextual Info: WESTERN D IG IT A L CORP i % 54E D r ' . • ■ T71ÖE2Ö G01SQÖE 23ß HlilDC ' 111 WD90C56 'T -S Z '-V b -H ' — Video Local Bus Interface — 1 ^ V LB l) Device BBBMW ■ H *— B ill— *■:■<■.■■'•'■■; ' : * ■■, ' . ■ > ■ ' . V

AT9000

Contextual Info: P L X TECHNOLOGY CORP 3SE T> böSSlHT GGOaiSI T IPLX T-52-33-55 EISA 9000 t • e EISA Bus Master Interface Chip for High Performance Controllers Preliminary December!990 Features General Description The EISA 9000 is designed to provide the most compact, inexpensive and highest performance EISA bus master

Contextual Info: AHM85 Series GREEN POWER • Medical & IT Safety Approvals • Energy Star Level V • CEC 2008 & EISA 2007 Compliant • IP22 Environmental Rating • Compact Format 5.90” x 2.52” x 1.45” • <0.5 W Standby Power • 85 W • Class I & Class II Models