32BT Search Results

VT-200

Contextual Info: V850ES/JG3-L 24-Jul-08 Evaluation of Subsystem Clock Oscillation Circuit VT-200 12.5pF with uPD70F3738GC-32BT [LQFP 14x14 0.50mm pitch] Measurement conditions : 3.3V Vdd=2.2 to 3.6V Model :VT-200 Frequency Frequency tolerance :Fo=32.768kHz :dF/Fo= +/-20x10-6

UPD70F3738GC

Contextual Info: V850ES/JG3-L 24-Jul-08 Evaluation of Subsystem Clock Oscillation Circuit SP-T2A 12.5pF with uPD70F3738GC-32BT [ LQFP 14x14 0.50mm pitch] Measurement conditions : 3.3V Vdd=2.2 to 3.6V Model :SP-T2A Frequency Frequency tolerance :Fo=32.768kHz :dF/Fo= +/-20x10-6

VT-200

Contextual Info: V850ES/JG3-L 24-Jul-08 Evaluation of Subsystem Clock Oscillation Circuit VT-200 6.0pF with uPD70F3738GC-32BT [LQFP 14x14 0.50mm pitch] Measurement conditions : 3.3V Vdd=2.2 to 3.6V Model :VT-200 Frequency Frequency tolerance :Fo=32.768kHz :dF/Fo= +/-20x10-6

quartz 3276800

Abstract: 65KOHM UPD70F37
Contextual Info: V850ES/JG3-L 24-Jul-08 Evaluation of Subsystem Clock Oscillation Circuit SSP-T7 12.5pF with uPD70F3738GC-32BT [LQFP 14x14 0.50mm pitch] Measurement conditions : 3.3V Vdd=2.2 to 3.6V Model :SSP-T7 Frequency Frequency tolerance :Fo=32.768kHz :dF/Fo= +/-20x10-6

Contextual Info: V850ES/JG3-L 24-Jul-08 Evaluation of Subsystem Clock Oscillation Circuit SP-T2A 6.0pF with uPD70F3738GC-32BT [ LQFP 14x14 0.50mm pitch] Measurement conditions : 3.3V Vdd=2.2 to 3.6V Model :SP-T2A Frequency Frequency tolerance :Fo=32.768kHz :dF/Fo= +/-20x10-6

Contextual Info: V850ES/JG3-L 24-Jul-08 Evaluation of Subsystem Clock Oscillation Circuit SSP-T7 7.0pF with uPD70F3738GC-32BT [LQFP 14x14 0.50mm pitch] Measurement conditions : 3.3V Vdd=2.2 to 3.6V Model :SSP-T7 Frequency Frequency tolerance :Fo=32.768kHz :dF/Fo= +/-20x10-6

Contextual Info: ¡ p f ô n y iM * ? M80186 HIGH INTEGRATION 16-BIT MICROPROCESSOR Military • Direct Addressing Capability to 1 MByte of Memory a Completely Object Code Compatible ■ Integrated Feature Set — Enhanced M8086-2 CPU — Clock Generator — 2 Independent, High-Speed DMA

Cyrix FasMath

Abstract: CX-83S87 cyrix 386SX fcom 7c DATA SHEET FOR OL 107 E SOLDER PEST FasMath 83D87 386SX CIRCUIT diagram 80386 83S87
Contextual Info: 83S87 User’s Manual High Performance CMOS Math Processor CYRIX CORP 3bE » H SSñ^ñn □ GQDlB'ì fi • T—49—1 2-05 FasMath CX-83S87 User's Manual January, 1990 o * P.O. Box 850118 Richardson, TX 76085-0118 CYR CYRIX CORP 3bE D ■ 2 5 ö t filici □ □ D D I M Q

msgf

Abstract: rxfm PIC18F8680 AN878 PICC-18 Specifies
Contextual Info: ECANTM Polling Module 1. Introduction. 2 2. Module Features . 2

Contextual Info: y-om '> 3 7 Schottky Barrier Diode Twin Diode OUTLINE DIMENSIONS SF30SC3L 30V 30A EEQ •1115 013 • 1 S V f= 0 .4 5 V • P rrsm m ^ y j II b=E—ju K •SÊSÜME2KV1SEÏ •S R B S • D C /D C U V A '- i ? • mm. y - h . oa « § § • a « . RATINGS

Contextual Info: Preliminary Information AMD-K6 -2 Processor Data Sheet 21850D/0 —August 1998 1 AMD£I AMD-K6®-2 Processor • A dvanced 6-Issue RISC86® S uperscalar Micro arch itectu re ♦ Ten p a ra lle l specialized execution un its ♦ M ultiple sophisticated x86-to-RISC86 in stru ctio n decoders

NETARM

Contextual Info: NET+Works for NET+ARM Hardware Reference Guide TM This guide provides a description of the NET+ARM 15/40 hardware. Part Number/Version: 8833198D Release Date: September, 2000 NETsilicon, Inc. 411 Waverley Oaks Road Suite 227 Waltham, MA 02452 Tel: 781 647-1234 or (800) 243-2333

Contextual Info: O rder this docum ent by 5VFPM U32D/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1,2, 4M DRAM Small Outline Dual-In-Line Memory Module SO-DIMM 1M x 32 (4MB), 2M x 32 (8M B) 7 2 -L E A D SM ALL O UTLINE DIMM CASE 992-01 JE D E C -S tandard 72 -L e a d Small Outline D u a l-In -L in e

MH25632CNXJ-7

Contextual Info: MITSUBISHI LSIs DRAM MODULE MH25632CNXJ-6,-7 FAST PAGE MODE 83886Q8-BIT(262144-WORD BY 32-BIT)DYNAMIC RAM DESCRIPTION PIN CONFIGURATION (TOP VIEW) [Single side] The M H25632CN XJ is 262144-word by 32-bit dynamic RAM module. That module consists of two industry 256K

B6731

Abstract: B67317
Contextual Info: NS32332-10/NS32332-15 National Semiconductor PRELIM INARY NS32332-10/NS32332-15 32-Bit Advanced Microprocessors G eneral Description Features The N S32332 is a 32-bit, virtual m em ory m icroprocessor with 4 GByte addressing and an enhanced internal Im ple­

NS32032

Abstract: 32032 CPU berh NS32016 NS32082 NS32381 3522 op ACB 20 Edd 44 NS32*32
Contextual Info: NS32332-10/NS32332-15 National Semiconductor PRELIM INARY NS32332-10/NS32332-15 32-Bit Advanced Microprocessors General Description Features The NS32332 is a 32-bit, virtual memory microprocessor with 4 GByte addressing and an enhanced internal imple­ mentation. It is fully object code compatible with other Se­

Contextual Info: A DEGSON DEGSON ELECTRONICS CO., LTD. sP?.mS«on Hood Hocd:Side entry 2 bolts H 3 2 B-SE-2B-M 32 (M40/M 50/PG29/P G 36/PG 42) H ou sin g Insert D im ensions for inserts see HE-016(x2) HE-016(x2) Bulkhead mounted(1 lever) H 32B-BK -1L Spring term inal H E -0 3 2 -M S (1 -1 6 )

ot 409

Abstract: Am386DX
Contextual Info: A D V A N C E D MI CRO D E V I C E S HfiE D • 02S7S2S O D 41 bb S 1 ■ AUDI T : H ci -1 7 - 3 4 Am386 SXL High-Performance, 32-Bit Microprocessor with 16-Bit Data Bus Advanced Micro Devices DISTINCTIVE CHARACTERISTICS ■ 25- and 20-MHz operating speeds

flexi packet microwave

Abstract: MICROWIRE eeprom interface am79c960 errata PE-65421 pulse ST7032 10BASE PQB132 PQT144 16S02
Contextual Info: Am79C970A PCnet -PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product DISTINCTIVE CHARACTERISTICS n Single-chip Ethernet controller for the Peripheral Component Interconnect PCI local bus n Supports ISO 8802-3 (IEEE/ANSI 802.3) and

Contextual Info: Am29C325 C M O S 3 2 -B it F lo a tin g -P o in t P ro ce sso r F IN A L D IS T IN C T IV E C H A R A C T E R IS T IC S • • Single VLSI device pe rfo rm s high-speed singlepre cisio n flo a tin g -p o in t arithm etic F lo a tin g -p o in t add ition, subtraction, and m ultiplicatio n

gi 9644 diode

Abstract: INTELDX4 write-through
Contextual Info: in te i, MILITARY Intel 486 PROCESSOR FAMILY • Write-Back Enhanced ln t e l D X 4 ™ Processor — Up to 100-MHz Operation -Speed-M ultiplying Technology — 32-Bit Architecture — 16K-Byte On-Chip Write-Back Cache — Integrated Floating-Point Unit

Contextual Info: Integrated Device Technology, Inc. PRELIMINARY IDT49C465 IDT49C465A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT FEATURES DESCRIPTION • • • • • • • • • • • • • • The IDT49C465/A is a 32-bit, two-data bus, Flow-thruEDC unit. The chip provides single-error correction and two and

PMEG3010BEA

Contextual Info: Evaluation Board User Guide UG-244 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluation Board for a Quad-Channel, 16-Bit, Serial Input, 4 mA to 20 mA, Voltage Output DAC with Dynamic Power Control and HART Connectivity

MC68020 Minimum System Configuration

Abstract: SKPT 12 skpt 17 MC68020 SKPT 28 MC68020 programming SKPT 25 MC68882 mc68ec020fg25 Motorola MC68ec0
Contextual Info: M68020UM/AD REV 2 MC68020 MC68EC020 MICROPROCESSORS USER'S MANUAL Introduction Processing States Signal Description On-Chip Cache Memory Bus Operation Exception Processing Coprocessor Interface Description Instruction Execution Timing Applications Information