8X8 INC
Abstract: 8x8 vcp LVP 47-10-43 LD8213 8x8 vcp tse 1885 40BS CCIR601 YUV422 8x83404
Contextual Info: 8x8, Inc. 8x83404 LVP DATASHEET 8x8 LVP Lowbitrate Videophone Processor OVERVIEW The 8x8 LVP i a single-chip programmable low bitrate video phone processor. A member of 8x8's MPA Multimedia Processor Architecture family, it forms the heart of either a PC-based or stand-alone
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8x834048x8 inc8x8 vcp lvp47-10-43+6ld82138x8 vcptse 188540bsccir601yuv422
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AMBA AXI to APB BUS Bridge verilog code
Abstract: AMBA AXI 3 to APB BUS Bridge verilog code AMBA APB bus protocol PL341 state diagram of AMBA AXI protocol v 1.0 ARM DUI 0333
Contextual Info: PrimeCell DDR2 Dynamic Memory Controller PL341 Revision: r0p0 Technical Reference Manual Copyright 2007 ARM Limited. All rights reserved. ARM DDI 0418A PrimeCell DDR2 Dynamic Memory Controller (PL341) Technical Reference Manual Copyright © 2007 ARM Limited. All rights reserved.
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pl341amba axi to apb bus bridge verilog codeamba axi 3 to apb bus bridge verilog codeamba apb bus protocol+2state diagram of amba axi protocol v 1.0arm dui 0333
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AMBA AXI verilog code
Abstract: AMBA AXI to APB BUS Bridge verilog code state diagram of AMBA AXI protocol v 1.0 FD001 User Guide ARM DUI 0333 PL341 FD001 AMBA AXI specifications 0418C ARM DUI 0333
Contextual Info: PrimeCell DDR2 Dynamic Memory Controller PL341 Revision: r0p1 Technical Reference Manual Copyright 2007 ARM Limited. All rights reserved. ARM DDI 0418C PrimeCell DDR2 Dynamic Memory Controller (PL341) Technical Reference Manual Copyright © 2007 ARM Limited. All rights reserved.
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pl3410418c32-bitamba axi verilog code+6amba axi to apb bus bridge verilog codestate diagram of amba axi protocol v 1.0fd001 user guide arm dui 0333fd001amba axi specificationsarm dui 0333
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axi to apb bridge
Abstract: JEP106 secure ADR-301 trustzone TZC-380 JEP-106 AMBA AXI transistor B1010 AMBA AXI specifications
Contextual Info: CoreLink TrustZone Address Space Controller TZC-380 Revision: r0p1 Technical Reference Manual Copyright 2008, 2010 ARM Limited. All rights reserved. ARM DDI 0431C ID090910 CoreLink TrustZone Address Space Controller TZC-380 Technical Reference Manual
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tzc-3800431cid090910axi to apb bridge+8jep106secureadr-301trustzonejep-106amba axitransistor b1010amba axi specifications
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DMA Controller DMA-330 Supplement to AMBA Designer ADR-301 User Guide
Abstract: adr-301 DMA-330 AMBA AXI dma controller designer user guide armv7-a dma 330 user guide pl330 DMA Controller PL330 Technical Reference Manual state machine for axi to apb bridge pl330 dma AMBA AXI
Contextual Info: CoreLink DMA Controller DMA-330 Revision: r1p1 Technical Reference Manual Copyright 2007, 2009-2010 ARM Limited. All rights reserved. ARM DDI 0424C ID080710 CoreLink DMA Controller DMA-330 Technical Reference Manual Copyright © 2007, 2009-2010 ARM Limited. All rights reserved.
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dma-3300424cid08071032-bit+9dma controller dma-330 supplement to amba designer adr-301 user guideadr-301amba axi dma controller designer user guidearmv7-adma 330 user guide pl330dma controller pl330 technical reference manualstate machine for axi to apb bridgepl330 dmaamba axi
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AMBA AXI dma controller designer user guide
Abstract: DMA-330 awid communication protocol FD001 FD001 User Guide ARM DUI 0333 AMBA AXI designer user guide DMA Controller PL330 Technical Reference Manual PL330 PL330 equivalent JEP106
Contextual Info: AMBA DMA Controller DMA-330 Revision: r1p0 Technical Reference Manual Copyright 2007, 2009 ARM Limited. All rights reserved. ARM DDI 0424B ID112209 AMBA DMA Controller DMA-330 Technical Reference Manual Copyright © 2007, 2009 ARM Limited. All rights reserved.
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dma-3300424bid11220932-bit+9amba axi dma controller designer user guideawid communication protocolfd001fd001 user guide arm dui 0333amba axi designer user guidedma controller pl330 technical reference manualpl330pl330 equivalentjep106
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AMBA AXI
Abstract: JEP106 state diagram of AMBA AXI protocol v 1.0 timing diagram of AMBA apb protocol JEP-106 AMBA AXI to APB BUS Bridge transistor B1010 ADR-301 BP135 axi to apb bridge
Contextual Info: TrustZone Address Space Controller TZC-380 Revision: r0p0 Technical Reference Manual Copyright 2008, 2010 ARM Limited. All rights reserved. ARM DDI 0431B (ID4/1/10) TrustZone Address Space Controller (TZC-380) Technical Reference Manual Copyright © 2008, 2010 ARM Limited. All rights reserved.
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tzc-3800431bid4/1/10id040110+10amba axijep106state diagram of amba axi protocol v 1.0timing diagram of amba apb protocoljep-106amba axi to apb bus bridgetransistor b1010adr-301bp135axi to apb bridge
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EH46
Contextual Info: HIS DFtAULNS S UNPUBLISHED. | RELEASED FOR PUBL1CXAT1Q REVISIONS ECN AD421B E C N .0 0 1 0 - 1 0 6 8 - 9 3 C J REVISED PER ECN 0 0 1 0 -0 0 4 1 -9 3 DIA DIA 3 PLCO * C2 PLCD SECTION DIA T-T (3 P L O DÔ NOT SCALE PftIN UNLESS SPECIFIED DIMENSIONS ]N mm CINCNE53
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ad421bcincne532p3463305329t8-s+2a22/arp23963/ueh46
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burndy YAV
Abstract: YAV1C-L1 yav25 YAV25-L3 MS20659 yav2c-l1 YAV25-L23 yav2c-l2
Contextual Info: NO. I A -Z SD0347B4 1 ^ ° BURNDY ^ CATALOG < 6 NUMBER ^ YAV2C-L3 YAV2C-L1 YAV2C-L2 YAV2C-L YAV2C-L23 YAV2C-L19 YAV2C-L26 YAV2C-L11 YAV2C-L4 YAV2C-L22 YAV2C-L38 YAV1C-L6 YAV1C-L1 YAV1C-L2 YAV1C-L YAV1C-L12 YAV1C-L4 YAV1C-L3 YAV1C-L5 YAV1C-L18 YAV25-L5 YAV25-L29
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sd0347b4yav2c-l23yav2c-l19yav2c-l26+14yav2c-l11yav2c-l22yav2c-l38yav1c-l12yav1c-l18yav25-l5burndy yavyav1c-l1yav25yav25-l3ms20659yav2c-l1yav25-l23yav2c-l2
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MIPI system trace protocol
Abstract: ATB flush AMBA AXI dma controller designer user guide CoreSight Architecture Specification DMA-330 PR430-PRDC-011726 MIPI system trace coresight state diagram of AMBA AXI protocol v 1.0 AMBA AXI
Contextual Info: CoreSight System Trace Macrocell Revision: r0p0 Technical Reference Manual Copyright 2010 ARM. All rights reserved. ARM DDI 0444A ID090310 CoreSight System Trace Macrocell Technical Reference Manual Copyright © 2010 ARM. All rights reserved. Release Information
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id090310mipi system trace protocolatb flushamba axi dma controller designer user guide+7coresight architecture specificationdma-330pr430-prdc-011726mipi system tracecoresightstate diagram of amba axi protocol v 1.0amba axi
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state diagram of AMBA AXI protocol v 1.0
Abstract: ddr phy interface adr-301 state machine diagram for axi bridge DMC TOOL AMBA AXI AMBA AXI 3 to APB BUS Bridge verilog code AMBA AXI to APB BUS Bridge verilog code
Contextual Info: CoreLink DDR2 Dynamic Memory Controller DMC-341 Revision: r1p1 Technical Reference Manual Copyright 2007, 2009-2010 ARM Limited. All rights reserved. ARM DDI 0418E (ID080910) CoreLink DDR2 Dynamic Memory Controller (DMC-341) Technical Reference Manual
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dmc-3410418eid08091032-bit+8state diagram of amba axi protocol v 1.0ddr phy interfaceadr-301state machine diagram for axi bridgedmc toolamba axiamba axi 3 to apb bus bridge verilog codeamba axi to apb bus bridge verilog code
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bnc amphenol
Abstract: IC 324 arp
Contextual Info: REVISIONS SYM DESCRIPTION DATE E.C.O, NO. APPR. OFFIC IA L ENG. RELEASE TO MFG. SEE NOTE 4, SEE NOTE 5. R E D E S IG N E D U 8. REDRAWN ITEM 7 WAS 31-10059 i ITEM 2 WAS 31-12003-1 V CHANGED PLATE NDTE lj REMOVED PLATE NuTES 2 i, 3 ADDED P LA T E L E T T E R S *. N DTES 9
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PL390
Abstract: state diagram of AMBA AXI protocol v 1.0 JEP-106 JEP106 FD001 arm generic interrupt controller AMBA AXI dma controller designer user guide 0416B axi to apb bridge AMBA AXI designer user guide
Contextual Info: PrimeCell Generic Interrupt Controller PL390 Revision: r0p0 Technical Reference Manual Copyright 2008, 2009 ARM Limited. All rights reserved. ARM DDI 0416B (ID012510) PrimeCell Generic Interrupt Controller (PL390) Technical Reference Manual Copyright © 2008, 2009 ARM Limited. All rights reserved.
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pl3900416bid01251032-bit+8state diagram of amba axi protocol v 1.0jep-106jep106fd001arm generic interrupt controlleramba axi dma controller designer user guideaxi to apb bridgeamba axi designer user guide
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FD001
Abstract: state diagram of AMBA AXI protocol v 1.0 AMBA file write AXI verilog code AMBA AXI ddr phy interface AMBA AXI designer user guide AMBA AXI to APB BUS Bridge verilog code PL341 AMBA AXI dma controller designer user guide FD001 User Guide ARM DUI 0333
Contextual Info: PrimeCell DDR2 Dynamic Memory Controller PL341 Revision: r1p0 Technical Reference Manual Copyright 2007, 2009 ARM Limited. All rights reserved. ARM DDI 0418D (ID050909) PrimeCell DDR2 Dynamic Memory Controller (PL341) Technical Reference Manual Copyright © 2007, 2009 ARM Limited. All rights reserved.
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pl3410418did050909id041709+1032-bitfd001state diagram of amba axi protocol v 1.0amba file write axi verilog codeamba axiddr phy interfaceamba axi designer user guideamba axi to apb bus bridge verilog codeamba axi dma controller designer user guidefd001 user guide arm dui 0333
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lpddr2
Abstract: micron lpddr2 lpddr2 datasheet micron lpddr2 datasheet Datasheet LPDDR2 SDRAM Jedec JESD209 lpddr2 phy lpddr JESD209-2 LPDDR2 SDRAM memory
Contextual Info: AMBA LPDDR2 Dynamic Memory Controller DMC-342 Revision: r0p0 Technical Reference Manual Copyright 2009 ARM. All rights reserved. ARM DDI 0436A ID103109 AMBA LPDDR2 Dynamic Memory Controller DMC-342 Technical Reference Manual Copyright © 2009 ARM. All rights reserved.
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dmc-342id10310932-bitlpddr2+9micron lpddr2lpddr2 datasheetmicron lpddr2 datasheetdatasheet lpddr2 sdramjedec jesd209lpddr2 phylpddrjesd209-2lpddr2 sdram memory
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AMBA AXI to APB BUS Bridge verilog code
Abstract: verilog code for dpd 0x00000212 state machine for axi to apb bridge AMBA AXI verilog code FD001 User Guide ARM DUI 0333 PL340 0x80000028 state diagram of AMBA AXI protocol v 1.0 verilog code for amba apb master
Contextual Info: PrimeCell Dynamic Memory Controller PL340 Revision: r3p0 Technical Reference Manual Copyright 2004-2007 ARM Limited. All rights reserved. ARM DDI 0331F PrimeCell Dynamic Memory Controller (PL340) Technical Reference Manual Copyright © 2004-2007 ARM Limited. All rights reserved.
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pl3400331famba axi to apb bus bridge verilog codeverilog code for dpd+70x00000212state machine for axi to apb bridgeamba axi verilog codefd001 user guide arm dui 03330x80000028state diagram of amba axi protocol v 1.0verilog code for amba apb master
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Dynamic Memory Controller
Abstract: AMBA AXI dma controller designer user guide verilog code for amba apb master PL340 edram macro AMBA AHB to APB BUS Bridge verilog code AMBA AXI designer user guide AMBA AXI to APB BUS Bridge verilog code FD001 User Guide ARM DUI 0333 0x00000212
Contextual Info: PrimeCell Dynamic Memory Controller PL340 Revision: r2p0 Technical Reference Manual Copyright 2004-2007 ARM Limited. All rights reserved. ARM DDI 0331E PrimeCell Dynamic Memory Controller (PL340) Technical Reference Manual Copyright © 2004-2007 ARM Limited. All rights reserved.
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pl3400331edynamic memory controlleramba axi dma controller designer user guide+7verilog code for amba apb masteredram macroamba ahb to apb bus bridge verilog codeamba axi designer user guideamba axi to apb bus bridge verilog codefd001 user guide arm dui 03330x00000212
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AMBA AXI dma controller designer user guide
Abstract: DMA Controller PL330 Technical Reference Manual FD001 dma 330 user guide pl330 FD001 User Guide ARM DUI 0333 0424A PL330 primecell PL330 pl330 dma ARM DUI 0333
Contextual Info: PrimeCell DMA Controller PL330 Revision: r0p0 Technical Reference Manual Copyright 2007 ARM Limited. All rights reserved. ARM DDI 0424A PrimeCell DMA Controller (PL330) Technical Reference Manual Copyright © 2007 ARM Limited. All rights reserved.
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pl33032-bitamba axi dma controller designer user guidedma controller pl330 technical reference manual+7fd001dma 330 user guide pl330fd001 user guide arm dui 03330424aprimecell pl330pl330 dmaarm dui 0333
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vhdl program of smartcard
Abstract: 10.1 inch lcd with led backlight 40 pin connector pinout vhdl code for rs232 receiver philips lcd 15.4 pinout PL041 vhdl code for a 16*2 lcd schematic diagram tv sharp LM-XCV2000 schematic diagram lcd tv sharp inverter 9PIN MMC socket
Contextual Info: Integrator/IM-PD1 User Guide Copyright 2001-2003. All rights reserved. ARM DUI 0152E Integrator/IM-PD1 User Guide Copyright © 2001-2003. All rights reserved. Release Information Date Issue Change June 2001 A Initial issue July 2001 B Corrections to Table 3-3 on page 3-7.
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0152epl041pl110pl061+13pl181pl130pl021pl011vhdl program of smartcard10.1 inch lcd with led backlight 40 pin connector pinoutvhdl code for rs232 receiverphilips lcd 15.4 pinoutvhdl code for a 16*2 lcdschematic diagram tv sharplm-xcv2000schematic diagram lcd tv sharp inverter9pin mmc socket
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PL351
Abstract: PL353 FD001 User Guide ARM DUI 0333 verilog code for dual port ram with axi interface PL350 FD001 Edd 44 micron NAND FLASH INTERCONNECT nand fifo NAND FLASH 64MB
Contextual Info: PrimeCell Static Memory Controller PL350 series Revision: r2p1 Technical Reference Manual Copyright 2005-2007 ARM Limited. All rights reserved. ARM DDI 0380G PrimeCell Static Memory Controller (PL350 series) Technical Reference Manual Copyright © 2005-2007 ARM Limited. All rights reserved.
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pl3500380gpl351pl353+7fd001 user guide arm dui 0333verilog code for dual port ram with axi interfacefd001edd 44micron nand flash interconnectnand fifonand flash 64mb
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2609 al
Abstract: KT 708 459 MARKING sot89 powerex ks powerex kt THYRISTOR br 403
Contextual Info: POUEREX INC TID D • TS^MbSl ODDlflfiO 5 m Thyristor Assemblies-Water Cooled Assembly Module Type PTL6T620_ 15 _ 20 _30 PTL6T625_ 25 _30 _40 PTL7T720 _ 35 _ 45 _ 55 PTL7T7S0_55 _ 65 _ 75 PTL9T9G0_ 08 — — 10 _12
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ptl6t620_ptl6t625_ptl7t720ptkata20_+62609 alkt 708459 marking sot89powerex kspowerex ktthyristor br 403
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ATIC 64
Abstract: NORTEL asn EIA/TIA TSB -36 what is product ON 4914 ATM SYSTEM PROJECT- modules ATIC motion vector bitrate usrobotics 3com SS 4914 RC32364
Contextual Info: IDT Software Applications & Libraries Software Applications & Libraries Section 2 55 Software Applications & Libraries Accelerated Technology, Inc. CLIB Reentrant ANSI C Library Features Description ◆ No royalties ◆ C source code provided ◆ Reentrant ANSI C Library
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324/irc4640atic 64nortel asn+8eia/tia tsb -36what is product on 4914atm system project- modulesaticmotion vector bitrateusrobotics 3comss 4914rc32364
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PL310
Abstract: tcm 2911 TrustZone PL310 TECHNICAL MANUAL ARMv7 Architecture Reference Manual
Contextual Info: PL310 Cache Controller Revision: r0p0 Technical Reference Manual Copyright 2007 ARM Limited. All rights reserved. ARM DDI 0246A PL310 Cache Controller Technical Reference Manual Copyright © 2007 ARM Limited. All rights reserved. Release Information Change history
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pl310glossary-11glossary-12tcm 2911+3trustzonepl310 technical manualarmv7 architecture reference manual
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TR-008
Abstract: DS34T10x ds26521 DS21448 DS2148 DS2155 DS21Q55 DS3151 DS2149 Ncomm
Contextual Info: Maxim > App Notes > T/E Carrier and Packetized Keywords: difference, T1, E1, channel, frame, superframe, extended, ESF, SF, D4, CRC-4, CAS, multiframe, CCS, RBS, robbed bit, AIS, RAI, DMA Dec 20, 2001 APPLICATION NOTE 590 Maxim Telecommunications Frequently Asked Questions
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ds2155ds21q354ds21q552ds21q554+13com/an590an590app590appnote590tr-008ds34t10xds26521ds21448ds2148ds21q55ds3151ds2149ncomm
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