3142A Search Results

ITS 31422

Abstract: 2044B 2SC4523
Contextual Info: Ordering num ber: EN 3142A N0.3142A 2SC4523 NPN Epitaxial Planar Silicon Transistor i High-Speed Switching Applications Features . Adoption ofFBET, MBIT processes • Large current capacity • Low collector-to-emitter saturation voltage • Fast switching speed

Contextual Info: I O rd e rin g n u m b e r: EN 3142A 2SC4523 N0.3142A sa i \ YO N PN E p itax ial P la n a r Silicon T ra n sisto r High-Speed Switching Applications F e a tu r e s • Adoption of FBET, MBIT processes • Large c u rre n t capacity • Low collector-to-em itter s a tu ra tio n voltage

LM33256

Abstract: LM33256N 64K x 8 BIT DYNAMIC RAM LM33256K sanyo LC3564PL lc3664* sanyo LC324256 4m static ram 8K Static RAM 16k nmos dynamic ram
Contextual Info: SANYO SEMICONDUCTOR CORP Continued from preceding page. 3SE D • 7 n 7 D 7 b 0QD75b3 S ■ T'W'Zl-V- M E M O R I E S monolithic integrated circuit —-v.y *f* ; Type 1 . ij Package' Pins 4 Package’ -■Circuit Functions & Applications c : * j: MainSjedficafibns

3195A

Contextual Info: XC3100, XC3100A Logic Cell Array Families Product Specifications F eatu re s Description • Two ultra-high-speed FPGA families with six members each XC3100 and XC3100A are performance-optimized rela­ tives of the XC3000 and XC3000A families. While all families are footprint compatible, the XC3100 and XC3100A

Xilinx XC3090A

Abstract: crystal KDS 4m his 3020a
Contextual Info: XC3000 Series Field Programmable Gate Arrays XC3000A/L, XC31OOA/L O lL IN X Novem ber 9, 1998 (Version 3.1) Product Description Features • • • • • • • • C om plete line of four related Field Program m able Gate A rray product fam ilies

Contextual Info: IM P O R T A N T N O TIC E All new designs should use XC3000A or XC3100A. Information on XC3000 and XC3100 is presented here as reference for existing designs. £ x il in x XC3000, XC3000A, XC3000L, XC3100, XC3100A Logic Cell Array Families Product Description

XC17256DPD8C

Abstract: XC17256DPD8I
Contextual Info: £ XILINX XC1700D Family of Serial Configuration PROMs June 1, 1996 Version 1.0 Product Specification Features Description Extended family of one-time programmable (OTP) bit-serial read-only memories used for storing the configuration bitstreams of Xilinx FPGAs

M3P1

Abstract: KD 2107 X3032
Contextual Info: XC3000, XC3000A, XC3000L, XC3100, XC3100A Logic Cell Array Families £ Product Description Features • Complete XACT Development System - Schematic capture, automatic place and route - Logic and timing simulation - Interactive design editor for design optimization

OSC52

Abstract: XC3000 XC3100A XC4000A XC4000E XC4025 XC5200 vq100 xilinx xc3000 xact reference guide
Contextual Info: book : cover 1 Wed Jul 3 10:08:16 1996 R Release Document XACTstep Version 5.2/6.0 Synopsys October 1995 Read This Before Installation book : cover 2 Wed Jul 3 10:08:16 1996 Synopsys Xilinx Development System book : online i Wed Jul 3 10:08:16 1996 Installing Online Documentation

TRANSISTOR REPLACEMENT GUIDE

Abstract: 3195A verilog hdl code for parity generator xc3000 xact vhdl code for 8-bit parity checker 3000a7 vhdl code for 8 bit ODD parity generator CMOS 4002 X4897 XC4000A
Contextual Info: Introduction Getting Started FPGA Compiler Tutorial Design Compiler Tutorial Xilinx Synopsys Interface FPGA User Guide Using the FPGA Compiler Using the Design Compiler Simulating Your FPGA Design Files, Programs, and Libraries Xilinx Synopsys Interface FPGA User Guide — December, 1994 0401291 01 Printed in U.S.A.

XC2018 PC84

Abstract: DS401 XC3042 pc84 CORE i3 ARCHITECTURE CORE i3 INTERNAL ARCHITECTURE XC3020 PG120 PG156 xc4005 pg156 XC7000
Contextual Info: R Release Document Xilinx Synopsys Interface Version 3.3 Software, Interface, and Libraries June 1995 Read This Before Installation R Software Versions Program Version Program Version APR 5.1 XDelay 5.1 APRLOOP 5.1 XDM 5.1 HM2RPM 5.1 XEMake 5.1 LCA2XNF 5.1

L1373

Abstract: 800PDB20 10000a diodes 800PDB10 800PDB30 800PDB40 800PDB50 800PDB60 RS-397 2090-DA
Contextual Info: "? i » F |4 a S S 4 5 2 D 0D 73bT 5 Data Sheet No. PD-2.182 4855452 INTERNATIONAL RECTIFIER 73C 07369 D INTERNATIONAL RECTIFIER 800PDB SERIES 1 0 0 0 Amp Hockey Puk Power Silicon R ectifier Diodes Major Ratings and Characteristics 800PDB 'F A V @ Max. T c

1765DPC

Abstract: XC17128D Series XC17128DPC XC1765D Series XC17256DDD8M 3164A XC17128DPC20I XC17128DPD8I XC1736DPD8I XC17256DV08C
Contextual Info: JIXILINX XC1700D Family of Serial Configuration PROMs June 1, 1996 Version 1.0 Product Specification Features Description Extended family of one-time programmable (OTP) bit-serial read-only memories used for storing the configuration bitstreams of Xiiinx FPGAs

A7 SMD TRANSISTOR

Abstract: fnd 503 7-segment 4013 FLIP FLOP APPLICATION DIAGRAMS SMD fuse P110 HP 1003 WA transistor SMD making code GC 1736DPC verilog code for 32 BIT ALU implementation xilinx xc95108 jtag cable Schematic RCL TOKO data
Contextual Info: Data Book The Programmable Logic Data Book Success made simple Click anywhere on this page to continue 9/96 On behalf of the employees of Xilinx, our sales representatives, our distributors, and our manufacturing partners, welcome to our 1996 Data Book, and thank you for your interest in

A23 780-4

Abstract: vhdl code for 8-bit BCD adder star delta wiring diagram with timer CI 7448 XC6200 XC4013XL PIN BG256 100352 The 555 Timer Applications Sourcebook schemat xilinx xc3000a MARKING CODE
Contextual Info: The Programmable Logic Data Book April 1998 R , XILINX, XACT, XC2064, XC3090, XC4005, XC-DS501, FPGA Architect, FPGA Foundry, NeoCAD, NeoCAD EPIC, NeoCAD PRISM, NeoROUTE, Plus Logic, Plustran, P+, Timing Wizard, and TRACE are registered trademarks of Xilinx, Inc.

TO-200AD

Abstract: 125OC
Contextual Info: AEGIS SEMICONDUTORES LTDA. A5C:1000S.XX.YY VOLTAGE RATINGS VRRM , VR V Max. rep. peak reverse voltage Part Number O VRSM , VR (V) Max. nonrep. peak reverse voltage O O TJ = 0 to 150 C TJ = -40 to 0 C TJ = 25 to 150 C A1C:1000S.04.33 400 400 500 A1C:1000S.06.33

military part marking symbols triangle

Abstract: marking m2i Q020G qml38535 L3T SMD MARKING qml-38535 1/transistor st 9514
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED REV SHEET REV SHEET 15 16 17 REV STATUS OF SHEETS 18 19 20 STANDARD M ICROCIRCUIT DRAW ING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE 22 23 24 25 26 1 2

lc3664* sanyo

Abstract: aml10 3012A N3015B LC3664AML LC3664AL AML-85 ue36 SL54 LC3664A
Contextual Info: I > tX 3 - KNa N 3015B NO. 30158 7151 M fc^ :L-X lto ^ 3 0 t5 A £ $ U Ö '*T < £ S< ,V , L C • 3 6 L C 3 6 4 A - 6 6 4 , A « . A a S , A M * * * . L , A * n n s > y a > *f - v / / CMOS L S I // u > h n - - M S * :5 E ,C n ,C E 2 . . . . S L , A M L 64K< 81927-k^

SERVICE MANUAL OF FLUKE 175

Abstract: SHARP IC 701 I X11 dot led display large size with circuit diagram IR power mosfet switching power supply The 555 Timer Applications Sourcebook interfacing cpld xc9572 with keyboard distributed control system of power plant 100352 XC3090-100PG175 xc95144 pinout
Contextual Info: R , XILINX, XACT, XC2064, XC3090, XC4005, XC-DS501, FPGA Architect, FPGA Foundry, NeoCAD, NeoCAD EPIC, NeoCAD PRISM, NeoROUTE, Plus Logic, Plustran, P+, Timing Wizard, and TRACE are registered trademarks of Xilinx, Inc. , all XC-prefix product designations, XACTstep, XACTstep Advanced, XACTstep Foundry, XACT-Floorplanner,

SANYO sh2a027-1

Abstract: 3116-SIP12S ic 4040 MPP36S SIP14H 3047a 3151-QIP100E 3149-DIP48S 3037A-DIP20H 3029A-DIP28S
Contextual Info: PACKAGE DIMENSIO Package dimensions for all o f Sanyo's semicondustor devices are provided below. Dimensions are all given in millimeters and those which are not specified as min or max are typical values. Unit: mm 10.9 Package marking is not provided. Refer to the transistor ca ta lo g for electrical connection and lead

XC3042A pinout

Abstract: 3195A transistor A6I 3020L XC3000 XC3000A 1.2 8x8 Dot Matrix XC3020A XC3030A XC3100A
Contextual Info: XC3000 Series Field Programmable Gate Arrays  June 1, 1996 Version 2.0 Product Description Features • • • • • • • • Complete line of four related Field Programmable Gate Array product families - XC3000A, XC3000L, XC3100A, XC3100L Ideal for a wide range of custom VLSI design tasks

LC3664AMLL

Abstract: static ram LC3664AML dynamic ram module
Contextual Info: 1 Mbyte CM O S dynamic RAM modules Package Type Number of pins and configuration Drawing number LC3M081OOYP SIM 30 3167 1 Mbyte 1 048 576 X 8 CM O S dynamic RAM module 80, 100 ns access time, high-speed page mode, pin type LC3M08100YS SIM 30 3166 1 Mbyte (1 048 576

diagram transistor tt 2140

Abstract: JCA Technology low noise amplifier 3195A Xilinx XC3090 transistor A6I Transistor TT 2140 3164A equivalent for transistor tt 2146
Contextual Info: _ XC3000, XC3000A, XC3000L, XC3100, XC3100A Logic Cell Array Families Product Description F e a tu re s • Complete XACT Development System - Schematic capture, automatic place and route - Logic and timing simulation - Interactive design editor for design optimization

54 VN 4302 93

Abstract: KDI A91 XC3042A pinout U/25/20/TN26/15/54 VN 4302 93
Contextual Info: \T ^ XC3000 Series Field Programmable Gate Arrays XC3000A/L, XC3100A/L V|1 INY n/x November 20, 1997 (Version 3.0) Product Description Features • • • • • • • • - Complete line of four related Field Programmable Gate Array product families