3 INPUT NAND GATE DATA SHEET Search Results

Contextual Info: Data Sheet HD74LV1GW97A R04DS0037EJ0400 Rev.4.00 Jan 10, 2014 Configurable Multiple–Function Gate Description The HD74LV1GW97A has configurable multiple–function gate in a 6 pin package. The Output state is determined by eight patterns of 3–bit input. The user can choose the logic functions AND, NAND, OR, NOR, INVERTER, Non–

74AUP1G58

Abstract: 74AUP1G58GF 74AUP1G58GM JESD22-A114E
Contextual Info: 74AUP1G58 Low-power configurable multiple function gate Rev. 02 — 26 March 2009 Product data sheet 1. General description The 74AUP1G58 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,

74LVC00A

Abstract: 74LVC00ABQ 74LVC00AD 74LVC00ADB 74LVC00APW DHVQFN14 SSOP14 TSSOP14 dhvqfn14 footprint
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC00A Quad 2-input NAND gate Product specification Supersedes data of 2002 Mar 05 2003 May 07 Philips Semiconductors Product specification Quad 2-input NAND gate 74LVC00A FEATURES DESCRIPTION • 5 V tolerant inputs for interfacing with 5 V logic

AHCT00

Abstract: 74AHC00D 74AHC00 74AHC00BQ 74AHC00PW 74AHCT00 TSSOP14
Contextual Info: 74AHC00; 74AHCT00 Quad 2-input NAND gate Rev. 04 — 28 April 2008 Product data sheet 1. General description The 74AHC00; 74AHCT00 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC

Marking code V7

Contextual Info: 74LVC2G00 Dual 2-input NAND gate Rev. 11 — 22 June 2012 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.

Contextual Info: 74AUP1G00 Low-power 2-input NAND gate Rev. 6 — 27 June 2012 Product data sheet 1. General description The 74AUP1G00 provides the single 2-input NAND function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

MC14081B

Abstract: MC14001 MC14001B MC14002B MC14078 MC14025B MC14068B MC14078B CD4000 MC14011B
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC14001B Quad 2-Input NOR Gate B-Suffix Series CMOS Gates MC14002B The B Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure Complementary MOS . Their primary use is where low power dissipation and/or high

62A17

Abstract: HCA62A17 62A50 18PDIP 68-LCC
Contextual Info: í Order this data sheet by HCA62A00/D M MOTOROLA HCA62A00 Series SEM ICO NDUCTO RS P.O B O X 20912 • PHOENIX, A R IZ O N A 85036 HCA62A00 SERIES CMOS MACROCELL ARRAYS The HCA62A00 series m acrocell arrays are im plem ented in sil­ icon gate, 2-m icron draw n gate length, dual-layer metal intercon­

74LVC132A

Abstract: 74LVC132ABQ 74LVC132AD 74LVC132APW TSSOP14
Contextual Info: 74LVC132A Quad 2-input NAND Schmitt trigger Rev. 01 — 15 December 2006 Product data sheet 1. General description The 74LVC132A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The 74LVC132A provides four 2-input NAND gates with Schmitt trigger inputs. It is

CD54HC03

Abstract: CD54HC03F3A CD54HCT03 CD54HCT03F3A CD74HC03 CD74HCT03 CT03
Contextual Info: [ /Title CD74H C03, CD74H CT03 /Subject (High Speed CMOS Logic Quad 2Input CD54HC03, CD74HC03, CD54HCT03, CD74HCT03 Data sheet acquired from Harris Semiconductor SCHS126C High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain February 1998 - Revised May 2003

Contextual Info: SN74LVC1G98-Q1 CONFIGURABLE MULTIPLE-FUNCTION GATE www.ti.com SCES562B – MARCH 2004 – REVISED DECEMBER 2005 FEATURES • • • • • • • • • • 1 Qualification in Accordance With AEC-Q100 (1) Qualified for Automotive Applications Customer-Specific Configuration Control Can

D4572

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS090C − Revised October 2003 The CD4572UB types are supplied in 16-lead dual-in-line plastic packages E suffix , 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

Contextual Info: SN74LVC1G132 SINGLE 2-INPUT NAND GATE WITH SCHMITT-TRIGGER INPUTS www.ti.com SCES546A – FEBRUARY 2004 – REVISED MAY 2005 FEATURES • • • • • • • • • DBV OR DCK PACKAGE TOP VIEW Available in Texas Instruments NanoStar and NanoFree™ Packages

Contextual Info: SN74LVC1G98ĆQ1 CONFIGURABLE MULTIPLEĆFUNCTION GATE SCES562B − MARCH 2004 − REVISED SEPTEMBER 2004 D Qualification in Accordance With D Ioff Supports Partial-Power-Down Mode AEC-Q100† Operation D Qualified for Automotive Applications D Customer-Specific Configuration Control

74AUP1G97

Abstract: 74AUP1G97GF 74AUP1G97GM 74AUP1G97GW
Contextual Info: 74AUP1G97 Low-power configurable multiple function gate Rev. 01 — 7 November 2006 Product data sheet 1. General description The 74AUP1G97 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Contextual Info: SN74LVC1G38 SINGLE 2-INPUT NAND GATE WITH OPEN-DRAIN OUTPUT www.ti.com SCES538A – JANUARY 2004 – REVISED APRIL 2005 FEATURES • • • • • • • • • DBV OR DCK PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages

Contextual Info: SN74LVC2G132 DUAL 2-INPUT NAND GATE WITH SCHMITT-TRIGGER INPUTS www.ti.com SCES547C – FEBRUARY 2004 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V

Contextual Info: SN74LVC1G98 CONFIGURABLE MULTIPLE-FUNCTION GATE www.ti.com SCES417I – DECEMBER 2002 – REVISED MARCH 2006 FEATURES • • • • • • • • Available in the Texas Instruments NanoStar and NanoFree™ Packages Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V

Contextual Info: [ /Title CD74H C03, CD74H CT03 /Subject (High Speed CMOS Logic Quad 2Input CD54HC03, CD74HC03, CD54HCT03, CD74HCT03 Data sheet acquired from Harris Semiconductor SCHS126D High-Speed CMOS Logic Quad 2-Input NAND Gate with Open Drain February 1998 - Revised September 2003

8251a usart interface from z80

Abstract: UDL TM 500 f922 verilog code for 8254 timer l912 256x32 POWER MODULE TM 31 udl 500 78K3 F5S4
Contextual Info: L4E75BS DÜHBÖGb 3ÔÔ B I N E C E CB-C7, 5-VOLT 0.8-M ICRON CELL-BASED CMOS ASIC NEC NEC Electronics Inc. August 1993 Description Figure 1. Integrated HDD Solution with CBC7 Cell-Based ASIC with Embedded 78K3 MPU, Compiled SRAMs and A/D Converters CB-C7 cell-based product family is a 0.8-micron drawn

Contextual Info: [ /Title CD54H C30, CD74H C30, CD74H CT30 /Subject (High Speed CMOS Logic 8- CD54/74HC30, CD54/74HCT30 Data sheet acquired from Harris Semiconductor SCHS121D High Speed CMOS Logic 8-Input NAND Gate August 1997 - Revised September 2003 Features Description

intel date code marking NAND Flash

Abstract: ARMv5TE instruction set MLC nand 2012 153 ball eMMC memory flash controller usb state machine for ahb to apb bridge iNAND eMMC 4 41 emmc spi bridge emmc bga 162 LPC3130FET180
Contextual Info: LPC3130/3131 Low-cost, low-power ARM926EJ-S MCUs with high-speed USB 2.0 OTG, SD/MMC, and NAND flash controller Rev. 2 — 29 May 2012 Product data sheet 1. General description The NXP LPC3130/3131 combine an 180 MHz ARM926EJ-S CPU core, high-speed USB 2.0 On-The-Go OTG , up to 192 KB SRAM, NAND flash controller, flexible external bus

KSZ8081RN

Abstract: KSZ8081RNA LF-H41S-1 KSZ8081RNAca KSZ8081RNDCC KSZ8081RNAIA KSZ8081RNAIC KSZ8081 mlt3-to-nrzi 18H11
Contextual Info: KSZ8081RNA/KSZ8081RND 10Base-T/100Base-TX PHY with RMII Support Data Sheet Rev. 1.0 General Description Features The KSZ8081RNA is a single-supply 10Base-T/100BaseTX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded

free transistor equivalent book

Abstract: HC03AG MC74HC03ANG LS03 MC74HC03A MC74HC03AD MC74HC03AN free transistor equivalent book download
Contextual Info: MC74HC03A Quad 2−Input NAND Gate with Open−Drain Outputs High−Performance Silicon−Gate CMOS The MC74HC03A is identical in pinout to the LS03. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.