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    TAIYO YUDEN D6HQ1G962DP35-Z

    - Product that comes on tape, but is not reeled (Alt: 16AH1149)
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    Avnet Americas () D6HQ1G962DP35-Z Ammo Pack 1
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    D6HQ1G962DP35-Z 17 Weeks 3,000
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    Mouser Electronics D6HQ1G962DP35-Z
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    Newark () D6HQ1G962DP35-Z Cut Tape 234 1
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    D6HQ1G962DP35-Z Tape & Reel 234 10
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    TTI D6HQ1G962DP35-Z Reel 3,000
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    Hirose Electric Co Ltd DF33C-12DP-3.3DSA(24)

    - Trays (Alt: DF33C-12DP-3.3DSA(24))
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    Avnet Americas DF33C-12DP-3.3DSA(24) Tray 12 Weeks 50
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    Mouser Electronics DF33C-12DP-3.3DSA(24) 850
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    TME DF33C-12DP-3.3DSA(24) 50
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    Avnet Abacus DF33C-12DP-3.3DSA(24) Tape & Reel 14 Weeks 50
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    Panasonic Electronic Components ECO-S2DP331B3

    - Bulk (Alt: ECO-S2DP331B3)
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    Avnet Americas ECO-S2DP331B3 Bulk 600
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    3M Interconnect 3750-12-DP3

    3750-12-DP3 - Bulk (Alt: 7010369599)
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    Newark 3750-12-DP3 Bulk 3
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    Panasonic Electronic Components ECE-T2DP392EA

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    Avnet Americas ECE-T2DP392EA Bulk 150
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    2DP3 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: FastEdge Series 2DP3110 1 of 2:10 Differential Fanout Buffer Features Description • Ten ECL/PECL differential outputs • Two ECL/PECL and HSTL differential or single-ended inputs • Hot-swappable/-insertable • 35-ps output-to-output skew typical


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    cy2dp311035-ps100-ps400-ps+232-pinmc100 PDF

    CBTV4010

    Abstract: ICS83840B ICS83840BH ICS83840BHT 2dp3 marking NS1 1DP6
    Contextual Info: PRELIMINARY ICS83840B Integrated Circuit Systems, Inc. DDR SDRAM MUX GENERAL DESCRIPTION FEATURES The ICS83840B is a DDR SDRAM MUX and is a ICS member of the HiPerClockS family of High PerforHiPerClockS mance Clock Solutions from ICS. The device has 10


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    ics83840b83840bhcbtv4010ics83840bh+4ics83840bht2dp3marking ns11dp6 PDF

    HB11061-P3

    Abstract: HB1105 CODE B7 HB11031 HB1105V-P0 Foxconn
    Contextual Info: SPECIFICATIONS Breakaway Header HB11 Series T/H Type 2.54mm [.100"] Pitch Mechanical Contact Retention Force: 0.91Kgf Min. Electrical Current Rating: 3.0A per pin min. Dielectric Withstanding Voltage: 500V AC. Insulation Resistance: 1000MΩ min. Physical


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    91kgf1000mhb1103121-may-2008+5hb11061-p3hb1105code b7hb1105v-p0foxconn PDF

    P332D

    Abstract: P103E P822D P822E
    Contextual Info: Aluminum Electrolytic Capacitors Large Can Type Series GUP Series GUP Features • High C V value with expanded case size «>0.4 x 108 - tj>90 x 222 ■ High ripple current approx. 1 . 5 - 2 times of GYU-series) Specifications Item Perform ance Characteristics


    OCR Scan
    p123fp332dp103ep822d+1p822e PDF

    Contextual Info: 3A Adjustable, and Fixed 1.5V, 3.3V, and 5V Linear Regulators Description Features The CS-5203A series of linear regu­ lators provides 3A at adjustable and fixed voltages with an accura­


    OCR Scan
    cs-5203acs-52o-220 PDF

    lz 150

    Abstract: 5203a-5 IN4002 LT1085 DIODE IN4002
    Contextual Info: CS-5203A C S - 5 2 0 3 A - l,- 2 ,- 3 ,- 5 -1,-2,-3,-5 3A Adjustable, and Fixed 1.5V, 3.3V, and 5V Linear Regulators D escription The CS-5203A series of linear regu­ lators provides 3A at adjustable and fixed voltages with an accura­ cy of ±1% and +2% respectively.


    OCR Scan
    s-5203a-1cs-5203at0-220lz 150+45203a-5in4002lt1085diode in4002 PDF

    PX15A13

    Abstract: 2cp21 rm11z-rm11c PX 1N4007 1n4001-1n4007 trr PX10A02 RM3Z 2CP21-2CP29 DO-15 1N5400-1N5408
    Contextual Info: 1.塑封整流二极管 序 型号 号 IF VRRM VF Trr A V V µs 外形 1A 50-1000V 1.1 R-1 2 1N4001-1N4007 1A 50-1000V 1.1 DO-41 3 1N5391-1N5399 1.5A 50-1000V 1.1


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    0-1000v1n4001-1n4007do-411n5391-1n5399+10do-151n5400-1n5408px15a132cp21rm11z-rm11cpx 1n40071n4001-1n4007 trrpx10a02rm3z2cp21-2cp29 PDF

    SMD TRANSISTOR N8

    Contextual Info: CS-5203A EMS C S - 5203A -l,- 2,-3,-5 Description T h e C S -5 2 0 3 A s e r ie s o f lin e a r r e g u ­ la to r s p r o v id e s 3 A a t a d ju s t a b le a n d fix e d v o lta g e s w ith a n a c c u r a ­ cy o f ±Y7< a n d ±2% re s p e c tiv e ly .


    OCR Scan
    cs-5203at0-220o-220smd transistor n8 PDF

    Contextual Info: 3A Adjustable, and Fixed 1.5V, 3.3V, and 5V Linear Regulators Description The CS-5203A series of linear regu­ lators provides 3A at adjustable a n d fixed voltages w ith a n accura­ cy of ±1% a n d ±2% respectively. The adjustable version uses tw o external resistors to set the o u tp u t


    OCR Scan
    cs-5203atq-220cs-52q3a PDF

    5203A

    Abstract: IN4002 LT1085 CS-5203A-X
    Contextual Info: CS-5203A -1,-2,-3,-5 CS-5203A-1,-2,-3,-5 3A Adjustable, and Fixed 1.5V, 3.3V, and 5V Linear Regulators Description The CS-5203A series of linear regulators provides 3A at adjustable and fixed voltages with an accuracy of ±1% and ±2% respectively. The adjustable version uses two


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    cs-5203acs-5203a-15203ain4002+2lt1085cs-5203a-x PDF

    Contextual Info: CBTU4411 11-bit DDR2 SDRAM MUX/bus switch with 12 Ω ON resistance Rev. 4 — 18 June 2012 Product data sheet 1. General description This 11-bit bus switch is designed for 1.7 V to 1.9 V VDD operation and SSTL_18 select input levels. Each Host port pin HPn is multiplexed to one of four DIMM port pins (xDPn). The


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    cbtu441111-bit PDF

    IN4002

    Abstract: LT1085 5203A NT 101 thermal protect
    Contextual Info: CS-5203A -1,-2,-3,-5 " 1 —— v i C S - 5 2 0 3 A - l ,- 2 ,- 3 ,- 5 3A Adjustable, and Fixed 1.5V, 3.3V, and 5V Linear Regulators Description The CS-5203A series of linear regu­ lators provides 3A at adjustable and fixed voltages with an accura­ cy of +1% and ±2% respectively.


    OCR Scan
    cs-5203at0-220in4002lt1085+25203ant 101 thermal protect PDF

    4B 22 25V

    Abstract: CBTV4010 ICS3840ALF ICS83840 ICS83840AH ICS83840AHLF ICS83840AHLFT ICS83840AHT hp8k tfBGA 8 x 8 tray
    Contextual Info: ICS83840 Integrated Circuit Systems, Inc. DDR SDRAM MUX GENERAL DESCRIPTION FEATURES The ICS83840 is a DDR SDRAM MUX and is a member of the HiPerClock S family of High HiPerClockS™ Performance Clock Solutions from ICS. The device has 10 Host Lines and each host line can


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    ics83840120ps83840ah4b 22 25v+8cbtv4010ics3840alfics83840ahics83840ahlfics83840ahlftics83840ahthp8ktfbga 8 x 8 tray PDF

    Contextual Info: FastEdge Series 2DP3110 1 of 2:10 Differential Fanout Buffer Features Description • Ten ECL/PECL differential outputs • Two ECL/PECL and HSTL differential or single-ended inputs • Hot-swappable/-insertable • 35-ps output-to-output skew typical


    Original
    cy2dp311035-ps100-ps400-ps+232-pinmc100 PDF

    CBTU4411EE

    Abstract: JESD22-A114 JESD22-A115 JESD78 2dp1
    Contextual Info: INTEGRATED CIRCUITS CBTU4411 11-bit DDR2 SDRAM mux/bus switch with 12 Ω on-resistance Product data sheet Supersedes data of 2005 Jan 07 Philips Semiconductors 2006 Sep 22 Philips Semiconductors Product data sheet 11-bit DDR2 SDRAM mux/bus switch with 12 Ω on-resistance


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    cbtu441111-bitcbtu4411eejesd22-a114+3jesd22-a115jesd782dp1 PDF

    JESD78

    Abstract: TFBGA64 CBTV4010 CBTV4010EE JESD22-A114 JESD22-A115 SA00589
    Contextual Info: INTEGRATED CIRCUITS CBTV4010 10-bit DDR SDRAM mux/bus switch Product data File under Integrated Circuits — ICL03 Philips Semiconductors 2002 Feb 19 Philips Semiconductors Product data 10-bit DDR SDRAM mux/bus switch CBTV4010 FEATURES DESCRIPTION • Enable signal is SSTL_2 compatible


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    cbtv401010-biticl03jesd78+5tfbga64cbtv4010eejesd22-a114jesd22-a115sa00589 PDF

    sdram schematic diagram

    Abstract: ICS384 CBTV4010 ICS252 ICS3840BLF ICS650-40A ICS83840B ICS83840BH ICS83840BHLF ICS83840BHLFT
    Contextual Info: DATA SHEET ICS83840B ICS83840B Integrated DDR SDRAM MUX Circuit DDR SDRAM MUX Systems, Inc. GENERAL DESCRIPTION FEATURES The ICS83840B is a DDR SDRAM MUX and is ICS a member of the HiPerClockS family of High HiPerClockS™ Performance Clock Solutions from ICS. The device has 10 Host Lines and each host line can


    Original
    ics83840b199707558gsdram schematic diagramics384+7cbtv4010ics252ics3840blfics650-40aics83840bhics83840bhlfics83840bhlft PDF

    Contextual Info: CBTU4411 11-bit DDR2 SDRAM MUX/bus switch with 12 Ω ON resistance Rev. 4 — 18 June 2012 Product data sheet 1. General description This 11-bit bus switch is designed for 1.7 V to 1.9 V VDD operation and SSTL_18 select input levels. Each Host port pin HPn is multiplexed to one of four DIMM port pins (xDPn). The


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    cbtu441111-bit PDF

    sdram schematic diagram

    Abstract: CBTV4010 ICS252 ICS3840ALF ICS650-40A ICS83840 ICS83840AH ICS83840AHLF ICS83840AHLFT ICS83840AHT
    Contextual Info: DATA SHEET ICS83840 ICS83840 Integrated DDR SDRAM MUX Circuit DDR SDRAM MUX Systems, Inc. GENERAL DESCRIPTION FEATURES The ICS83840 is a DDR SDRAM MUX and is a member of the HiPerClock S family of High HiPerClockS™ Performance Clock Solutions from ICS. The


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    ics83840120ps199707558gsdram schematic diagram+8cbtv4010ics252ics3840alfics650-40aics83840ahics83840ahlfics83840ahlftics83840aht PDF

    2dp3

    Abstract: CBTV4010 ICS3840BLF ICS83840B ICS83840BH ICS83840BHLF ICS83840BHLFT ICS83840BHT 4318C tsa11
    Contextual Info: ICS83840B Integrated Circuit Systems, Inc. DDR SDRAM MUX GENERAL DESCRIPTION FEATURES The ICS83840B is a DDR SDRAM MUX and is ICS a member of the HiPerClockS family of High HiPerClockS™ Performance Clock Solutions from ICS. The device has 10 Host Lines and each host line can


    Original
    ics83840b83840bh2dp3cbtv4010+7ics3840blfics83840bhics83840bhlfics83840bhlftics83840bht4318ctsa11 PDF

    CBTU4411EE

    Abstract: HP10 JESD22-A114 JESD22-A115 JESD78 001A 2dp1
    Contextual Info: CBTU4411 11-bit DDR2 SDRAM MUX/bus switch with 12 Ω ON resistance Rev. 03 — 12 October 2009 Product data sheet 1. General description This 11-bit bus switch is designed for 1.7 V to 1.9 V VDD operation and SSTL_18 select input levels. Each Host port pin HPn is multiplexed to one of four DIMM port pins (xDPn). The


    Original
    cbtu441111-bitcbtu4411eehp10+5jesd22-a114jesd22-a115jesd78001a2dp1 PDF

    Contextual Info: PRELIMINARY ICS83840B Integrated Circuit Systems, Inc. DDR SDRAM MUX GENERAL DESCRIPTION FEATURES The ICS83840B is a DDR SDRAM MUX and is ICS a member of the HiPerClockS family of High HiPerClockS™ Performance Clock Solutions from ICS. The device has 10 Host Lines and each host line can


    Original
    ics83840b83840bh PDF

    hp8k

    Abstract: 1DP6 4318C CBTV4010 ICS83840 ICS83840AH ICS83840AHT 2dp3
    Contextual Info: ICS83840 Integrated Circuit Systems, Inc. DDR SDRAM MUX GENERAL DESCRIPTION FEATURES The ICS83840 is a DDR SDRAM MUX and is a member of the HiPerClockS family of High PerforHiPerClockS mance Clock Solutions from ICS. The device has 10 Host Lines and each host line can be passed to 4


    Original
    ics83840120ps83840ahhp8k+61dp64318ccbtv4010ics83840ahics83840aht2dp3 PDF