MBM27256-25X
Abstract: 27256b MBM27256-25 MBM27256-30W
Contextual Info: FUJITSU M I C R O E L EC TR ON IC S ?ñ 3749762 FUJITSU Í>¿~| 374T7k5 000341*4 MICROELECTRONICS 78 C MBM27256-20-X, MBM27256-25-X, MBM27256-30-X, MBM27256-30-W MOS 262,144-Bit UV Erasable and Electrically Programmable Read Only Memory D escription The Fujitsu MBM27256-X and MBM27256-W are high speed
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374t7k5mbm27256-20-xmbm27256-25-xmbm27256-30-x+9mbm27256-30-w144-bitmbm27256-xmbm27256-w28-plnmbm27256-25x27256bmbm27256-25mbm27256-30w
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INTEL 2764A
Abstract: 2764a-2 i2764a 2764 memory chip 2764A2 2764A1 Z8051
Contextual Info: in t e i 2764A ADVANCED 64K 8Kx8 UV ERASABLE PROM - 200 nsec StandardAccess Time — HMOS H*-E Technology ' • Low Power - 6 0 mA Maximum Active " intel‘9ent Identifier Mode — Automated Programming Operations — 20 mA Maximum Standby in d ig e n t Programming™ Algorithm
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536-bitintel 2764a2764a-2i2764a+42764 memory chip2764a22764a1z8051
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27256 block diagram
Abstract: 27256-4 27256 EPROM T27256 27256 prom intel 27256 EPROM intel 27256 27256-3
Contextual Info: in t e f 27256 256K 32K x 8 UV ERASABLE PROM • Software Carrier Capability ■ Industry Standard Pinout. . . JEDEC ■ 250 ns Maximum Access Time ■ Two-Line Control Approved ■ Lo" PowAer ■ inte llgent Identifier Mode -A u to m a te d Programming Operations
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144-bit250ns27256 block diagram27256-4+627256 epromt2725627256 promintel 27256eprom intel 2725627256-3
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nmc27c512aq
Abstract: SD112b
Contextual Info: NATL SENICOND {MEMORY} IDE D | b S O H S b OOblSbT fl | p r e l im in a r y NMC27C512AN 524,288-Bit 64k x 8 One Time Programmable CMOS PROM General Description Features The NMC27C512AN is a high-speed 512K UV one time pro grammable CMOS EPROM, ideally suited for applications
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nmc27c512an288-bit28-pinnmc27c512aq+1sd112b
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ic programmer
Contextual Info: s ie b S D llS b NATL S E MI CO ND 00b52fc.l 33T «NSC3 MEMORY gH National SLA Semiconductor ~ r- NMC27C32B 32,768-Bit (4096 x 8) CMOS EPROM General Description Features The NMC27C32B is a 32k UV erasable and electrically re programmable CMOS EPROM, ideally suited for applica
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00b52fcnmc27c32b768-bit24-pin+1ic programmer
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Eprom B 2716 D
Abstract: NMC27C512AQ250 EPROM NMC27C512A NMC27C256
Contextual Info: NATL SEMICOND MEMORY 31E D bSQUHb QQt i340É PRELIM INARY National Semiconductor '7 '- V ^ - / 3 - 3 7 Features • Clocked sense amps for fast access time down to The NMC27C512A Is a high-speed 512k UV erasable and 150 ns electrically reprogrammable CMOS EPROM, Ideally suited
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nmc27c512a288-bitnmc27c512aqeeprom b 2716 d+3nmc27c512aq250eprom nmc27c512anmc27c256
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27S12
Abstract: 27128 memory nsc600
Contextual Info: 3IE DApril 1989 V 6 - / 3 - Z .J 27C64 65,536-Bit 8,192 x 8 UV Erasable CMOS PROM Military Qualified General Description Features The 27C64 Is a high-speed 64K UV erasable and electrically reprogrammable CMOS EPROM, ideally suited for applica tions where fast turnaround, pattern experimentation and
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0112b27c64536-bit28-pin+632-pin2-26a39m13193127s1227128 memorynsc600
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INTEL 2764
Abstract: 27128 eprom EPROM intel 27256 intel 2764 eprom intel EPROM 27128 AR294 27256 27256 pin diagram 27256 prom INTEL 27256 EPROM
Contextual Info: inter APPLICATION N O TE AP-154 A p ril 1983 v ÿ ' i ' .q ° *° IN TEL CORPORATION, 1983 4-1 APRIL 1983 ORDER NUMBER: 210970-003 AP-154 INTRODUCTION With the introduction of the 27256 32K byte EPROM, a new generation of high density componentized software is possi
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ap-154intel 276427128 epromeprom intel 27256+7intel 2764 epromintel eprom 27128ar2942725627256 pin diagram27256 promintel 27256 eprom
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MM2716-1
Abstract: MM2716 27C32 212si 27C128 27C256 27C64 MM2716E national semiconductor 27c32
Contextual Info: 553 National Æ Îà Semiconductor MM271616,384-Bit 2048 x 8 UV Erasable PROM MM2716 MM2716-1 450 350 450 5V ± 5% 5V ± 10% 5V ± 5 % Param eter/Order N um ber A ccess Time<ns) V c c Pow er Supply MM2716E General Description Features The MM2716 is a high speed 16k UV erasable and electric
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mm271616384-bitmm2716mm2716-1+8mm2716e24-pin27c32212si27c12827c25627c64national semiconductor 27c32
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sem 2105 16 pin
Contextual Info: ADSP-2100 Family DSP Microcomputers ADSP-21XX ANALOG DEVICES SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/
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adsp-2100adsp-21xx16-bitadsp-2111+4adsp-2164bs-4068-lead80-leadsem 2105 16 pin
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DIP-28
Abstract: ST27256-17XCP ST27256-20XCP Z8000 ST27256P
Contextual Info: Æ T SGS-THOMSON A 7 £ . RSUgMUUilgWWOeS ST27256P 256K 32K x 8 NMOS ONE TIME PROGRAMMABLE ROM • FAST ACCESS TIME: 170ns ■ ■ ■ ■ ■ 0 to + 70°C STANDARD TEMP. RANGE SINGLE +5V POWER SUPPLY ±10% VCc TOLERANCE AVAILABLE LOW STANDBY CURRENT (40mA MAX)
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st27256p170nsdip-28144-bit+4200nsst27256-17xcpst27256-20xcpz8000
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27256-25
Abstract: datasheet eprom 27256 DIP-28 ST27256-17XCP ST27256-20XCP Z8000 ST27256-25CP
Contextual Info: / = 7 S G S - T H O M S O N ST27256P * 7Æ m C M M @ [i[L d T M M S 256K 32K x 8 NMOS ONE TIME PROGRAMMABLE ROM • FAST ACCESS TIME: 170ns ■ ■ ■ ■ ■ 0 to + 70°C STANDARD TEMP. RANGE SINGLE + 5 V POWER SUPPLY ± 1 0 % VCc TOLERANCE AVAILABLE
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st27256p170nsdip-28144-bit+7200nsst27256-17xcp27256-25datasheet eprom 27256st27256-20xcpz8000st27256-25cp
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d774
Abstract: d778 b778 58C65 08CB 27HC642 58c256 df4a SIGNETICS 87C256 57C49B
Contextual Info: 40M I0I Device Support Rev 14.2 4 1M10 i Device Support (Rev 15.0) 42M I0I Device Support (Rev 14.1) (November 1994) Please note: Any device indicated by => is a new addition to the ydevice support list. S T A G PROORAMMCR3 Stag Programmers Limited Silver Court Watchmead Welwyn Garden City Herts AL7 ILT
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27c5i2a27c0i027c02027c040+1598c6428i6a27c6427hc6427hc64i27hc642d774d778b77858c6508cb58c256df4asignetics 87c25657c49b
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14-pin dual-in-line ic package
Abstract: TMS47256
Contextual Info: TMS47256 32.768-WORD BY 8-BIT READ-ONLY MEMORY JU NE 1983 - R E V ISE D N O V E M B E R 1985 N PACKAGE 32.768 X 8 Organization TOP VIEW Fully Static (No Clocks, No Refresh) NC C 1 ^ 2 8 H v c c 27 D a 1 4 A12C 2 All Inputs and Outputs TTL Compatible Single 5-V Power Supply
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tms47256768-wordtms47256-20tms47256-25+2tms47256-3014-pin dual-in-line ic package
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INTEL 2764 EPROM
Abstract: INTEL 2764 P2764-4
Contextual Info: 64K 8K X P2764 8 PRODUCTION EPROM Guaranteed 2 Minutes Maximum Programming Time Industry-Standard Pino u t. . . JEDEC Approved Low Active C u rren t. . . 100 mA Max. Compatible with High-Speed 8 MHz iAPX 186 . . . Zero WAIT State • Two-Line Control inte ligent Programming A lgorithm for Reliable Programming
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p2764250nsintel 2764 epromintel 2764+1p2764-4
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