25Z040A Search Results
25Z040A Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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M17SContextual Info: 25Z040A 128K x 36 PIPELINED ZWS SRAM GENERAL DESCRIPTION The W 25Z040A is a high-speed, low-power, Zero-Wait-State ZWS Synchronous Pipelined CMOS Static RAM organized as 131,072 x 36 bits. A built-in two-bit burst address counter supports both Linear and Interleaved burst mode. The mode to be executed is controlled by the LBO pin. A snooze |
OCR Scan |
w25z040a25z040afjfr-94sssi8-5-m17s+3 | |
ATPA
Abstract: 7130SA100P 24l01 7C263/4-35C 7164S15Y cy9122-25 7133SA35J 7142sa55 7130sa55p cy2149-45c
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Original |
cy2147-35ccy7c147-35ccy7c147-45ccy91l22-35c+14 | |
EPM5128LC
Abstract: IDT CYPRESS CROSS REFERENCE clocks epm5064lc-1 EPM5128LC-1 EPM5064LC EPM5128LC-2 EPM5128GI EPM5128JC-1 8464c 5962-8871309
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Original |
cy2148-35ccy21l48-35ccy7c168a-35ccy7c168a-25c+15 | |
EPM5128LC
Abstract: EPM5128GC epm5064lc-1 EPM5128LC1 59628867809r 5962-8984106LX EPM5128GI 7C19945DMB EPM5130GC-1 5962-8867812rx
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Original |
5962-8753903lx5962-8863701lx5962-8867003lx5962-8867809rx+15 |