256KB DYNAMIC RAM Search Results

FM24CL64b

Abstract: FM28V202 FM25CL64B FM24C64B FM28V402-C FM24C16B FM28MV802-C FM25V FM24CL04B fm24c04b
Contextual Info: Co mp uti ng M ete rin g Au tom oti ve Ind us tri al M ed ica l Sc ien tifi c g rin ete M ve oti m to Au ng uti p m Co c tifi n e i Sc ial str u Ind l ica ed M Short Form Catalog First Edition 2011 l ria st du In e iv ot m to Au g in er et M Ferroelectric random access memory F-RAM products combine

fm23mld16

Abstract: FM3316 7313 28 pin FM25L04 soic8 footprint interface 8KB ROM and 16KB RAM to 8051 FM22L16 FM6124 footprint soic28 RAMTRON
Contextual Info: Co mp uti ng M ete rin g Au tom oti ve Ind us tria l M ed ica l Sc ien tifi c g rin e t e M e tiv o tom Au ng uti p m Co fic nti e i Sc l tria s u Ind Short Form Catalog l ica d e M First Edition 2009 l ria st du In e iv ot m to Au g in er et M Ferroelectric random access memory F-RAM products combine

1K x 8 static ram

Abstract: Static RAM 64K x 8 BIT DYNAMIC RAM 32K 4K x 8 Synchronous Dynamic RAM static ram 64K IS25M080A EEPROM 16k, 32k, 64k, 128k, 256k, 512k, 1m, 2m, 4 rom 1K x 8 2Mbit EPROM flash memory 5V
Contextual Info: www.issi.com IS22C011 IS22C012 IS22C020 IS22C040 IS22C111 IS23SC1604 IS23SC4418 IS23SC4428 IS24C01 IS24C01-3 IS24C02 IS24C02-3 IS24C04 IS24C04-3 IS24C16 IS24C16-3 IS24C64 IS24C64-3 IS25F011A-3V IS25F011A-5V IS25F021A-3V IS25F021A-5V IS25F041A-3V IS25F041A-5V

Contextual Info: nRF51422 Multi-protocol Bluetooth low energy and ANT/ANT+ and 2.4GHz proprietary system-on-chip Multi-protocol wireless system-on-chip The nRF51422 is a powerful multi-protocol single chip solution for ANT/Bluetooth low energy applications. It incorporates

GT-6424

Abstract: RM7000C
Contextual Info: RM7000C FEATURES Fast Packet Cache™ increases system efficiency in networking applications • Integrated external cache controller up to 64 MB • User-selectable EZ Cache protocol eliminates the need for external tag RAMs. • High-performance floating-point unit 1600 MFLOPS maximum

ETSI ts 102.221

Abstract: uicc NOR Flash 102.221 jazelle 00-S3-J9CH java card Tornado "JAVA CARD" SC200
Contextual Info: S3FJ9CH CMOS Microcontroller for Smart Card Applications Advanced Information Publication Number 00-S3-J9CH December 2005 Ver1.0 OVERVIEW S3FJ9CH is specially designed and packaged for secure chip card application with massive NAND flash memory. S3FJ9CH is built on the 16/32-bit SC200 RISC processor. And S3FJ9CH has 32KB MASK ROM, 512K B NOR

arm gps

Abstract: qfn68 QFN-68 STA2056 STA2056 gps uarts TQFP176 GPS interface WITH ARM OSC32K
Contextual Info: STA2056 Palinuro True, single-chip solution for both autonomous and host-based GPS applications The STA2056 from STMicroelectronics is a single-chip GPS featuring complete RF for active antenna systems and baseband functionality in a QFN 68-pin package. The STA2056 System-on-Chip

intel 128MB NOR FLASH

Abstract: intel 256MB NOR FLASH
Contextual Info: Memory Organization on the SA-1100 Evaluation Platform An Application Note Order Number: EC−RCY1A−TE May 1998 This document describes the memory maps for the DIGITAL Semiconductor SA-1100 Microprocessor Evaluation Platform. The physical map includes implementation details where different to the SA-1100. The virtual map is as

mk22fn

Abstract: KE06
Contextual Info: TM August 2013 • Kinetis Portfolio - Baseline • Kinetis K – CSP Packaging • Kinetis K – Security Expansion • Kinetis K - Memory Expansion • Kinetis K – FPU Expansion • Kinetis L - Low Power • Kinetis E - 5V Robust • Kinetis V – Motor Control

Flash EEPROM card

Abstract: 68HC11 80C251 80C31 PSD813F1 PSD813F2 PSD813F3 PSD813F4 PSD813F5
Contextual Info: FLASH PSD MCU Peripherals Return to Main Menu What if you could. Speed up design time by 2-3 weeks? Program your entire system in only 7-seconds? Eliminate 6-square inches of board space? Reduce power consumption by 93%? Cure assembly flow headaches with JTAG first-time

Contextual Info: Freescale Semiconductor, Inc. Data Sheet: Advance Information KV31P100M120SF8 Rev 2, 03/2014 Kinetis KV31F 256KB Flash MKV31F256VLL12 MKV31F256VLH12 120 MHz Cortex-M4 Based Microcontroller with FPU The KV31 MCU family is a highly scalable member of the Kinetis

Contextual Info: Freescale Semiconductor, Inc. Data Sheet: Advance Information Document Number: K22P121M120SF8 Rev 2, 03/2014 Kinetis K22F 256KB Flash 120 MHz Cortex-M4 Based Microcontroller with FPU Ideal for low-power applications that require processing efficiency. Shares the comprehensive enablement and scalability

MSC2331A-80YS3

Abstract: MSC2331A-XX BS55 EPOXY
Contextual Info: 4bE D OKI s o m l c o n c • k b?24240 j c t o □DDc bb4 5 1 3 H O K I J r MSC2331A-XX YS3/KS3 r- 262, 144 BY 9 BIT DYNAMIC RAM MODULE GENERAL DESCRIPTION O K I SEMICONDUCTOR GROUP The Oki MSC2331A-XX YS3/KS3 is a fully decoded, 262,144 words X 9 bit CMOS dynamic random

71M6541

Abstract: MAX2992 G3-PLC Interface Guide MAX2992 energy meters Smart energy meter bill of materials 71M6542 MAX2991 Smart meter current and voltage sensor metrology IC for meter UART Program Examples ARM
Contextual Info: Meet Worldwide Metering Requirements Fourth-Generation SoCs Accelerate Meter Certification With four generations of metering SoCs and more than 50M units shipped to date, Maxim’s metrology products are found at the heart of the world’s most trusted energy meters. Our energy metering portfolio comprises a wide array of system-on-chip SoC devices

278088

Abstract: StrongARM SA-1100 intel 27820 strongArm
Contextual Info: Memory Organization on the StrongARM* SA-1100 Evaluation Platform Application Note October 1998 Order Number: 278203-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual

Contextual Info: INTEGRATED DEVICE tfc,E D • 4A25771 0012317 Tbl ■ H>T BiCMOS CacheRAM 32k x 9-BIT 288k-BIT BURST COUNTER & SELF-TIMED WRITE PRELIMINARY IDT71B589S FEATURES: DESCRIPTION: • • • • • • • • • The IDT71B589 is a very high-speed 32k x 9-bit static RAM

Contextual Info: 32K x 32 Fusion Memory SYNCHRONOUS PIPELINED CACHE RAM FEATURES: performance of SRAM with the cost structure of DRAM. It is fundamentally compatible with standard PBSRAM, with addi­ tional features to accommodate the internal DRAM operation of the memory. These additional features are defined so that

transistor GW 93 H

Abstract: 362-0 transistor 71F63
Contextual Info: 64 K x 32 Fusion Memory SYNCHRONOUS CACHE RAM ADVANCE INFORMAflON IDT71F632 Integrated Device Technology, Inc. FEATURES: • • • • • • • • • Uses IDT's Fusion Memory™ technology 66 and 75 MHz speed grades 3-1-1-1 Pipelined Burst Read 3-1-1-1 Pipelined Burst Write

362-0 transistor

Abstract: PBSRAM MCache
Contextual Info: ADVANCE INFORMATION IDT71F632 64Kx32 Fusion Memory SYNCHRONOUS CACHE RAM Integrated Device Technology, Inc. • • • • • • • • • Uses IDT's Fusion Memory technology 66 and 75 MHz speed grades 3-1-1-1 Pipelined Burst Read 3-1-1-1 Pipelined Burst Write

IDT71F432

Abstract: IDT71F432S66 IDT71F432S75
Contextual Info: PRELIMINARY IDT71F432 32K x 32 Fusion Memory SYNCHRONOUS PIPELINED CACHE RAM Integrated Device Technology, Inc. FEATURES: performance of SRAM with the cost structure of DRAM. It is fundamentally compatible with standard PBSRAM, with additional features to accommodate the internal DRAM operation

numonyx 106 ball

Abstract: A18A5 f2ck XA26
Contextual Info: Numonyx Velocity LP™ NV-RAM Mobile-DDR Flash Memory 512 Mbit and 1 Gbit Datasheet „ High-performance DDR-Mobile Interface — Two data transfers per clock cycle — Mega-transfers per second: — 333 with 16 pF load — 266 with 20 pF load — 200 with 24 pF load

roadmap ISSI

Abstract: IS61C1024 IS61C64AH IS61C64B IS62C64 IS89C52 IS25M080A5T2R IS80C32 flash memory 5v 16M-bit 48 TSOP ISSI
Contextual Info: Memory Based Solutions ISSI Integrated Silicon Solution, Inc. ISSI www.issi.com 1 ISSI_498 04/09/98 ® Integrated Silicon Solution, Inc. Memory Based Solutions ISSI Milestones • • • • • • • Incorporated - 1988 First Foundry Partnership TSMC - 1990

transistor A144

Abstract: TRANSISTOR A107 basic architecture of Pentium Processors Pentium "Voltage Regulator Module" pentium MOTHERBOARD CIRCUIT diagram 128 bit processor schematic 16 PIN PIR SENSOR IC PINOUT TTL 7408 AND propagation delay block diagram of pentium III drawn pin configuration of ic 7408
Contextual Info: PENTIUM III XEON PROCESSOR AT 600 MHz to 1 GHz with 256KB L2 Cache Datasheet Product Features § § § § Binary compatible with applications running on previous members of the Intel microprocessor family Optimized for 32-bit applications running on advanced 32-bit operating

Contextual Info: 64K X 32 Fusion Memory SYNCHRONOUS CACHE RAM FEATURES: . performance of SRAM with the cost structure of DRAM. It is fundamentally compatible with standard PBSRAM, with addi­ tional features to accommodate the internal DRAM operation of the memory. These additional features are defined so that