23BITS Search Results

AA30

Abstract: AA34 AB30 M21110 PRBS MSB NCN30
Contextual Info: M21110 17 x 17 3.2 Gbps Crosspoint Switch with Input Equalization Data Sheet Features - 4 Terminal Descriptions - 5 Specification Tables - 7 Functional Description - 17 Register Information - 21 Package Information - 28 World Wide Sales Companies - 37 21110-DSH-001-B, 3/27/03

the pin function of ic 7405

Abstract: AMZ8016-DMA
Contextual Info: 9 L 0 8 Z U IV AmZ8016 DM A T ransfe r C o ntroller DISTINCTIVE CHARACTERISTICS • • • Two independent multi-function channels Automatic loading/reloading of control parameters by each channel Optional automatic chaining of operations Channel interleave operations

outp32

Abstract: M21130 AA30 AA34 AB30 OUTP23 NCN30
Contextual Info: M21130 68 x 68 3.2 Gbps Crosspoint Switch with Input Equalization Data Sheet Features - 4 Terminal Descriptions - 5 Specification Tables - 8 Functional Description - 17 Register Information - 20 Package Information - 25 World Wide Sales Companies - 34 21130-DSH-001-B, 3/27/03

Contextual Info: DMA Transfer Controller DISTINCTIVE CHARACTERISTICS • • Channel interleave operations Masked data pattern matching for search operations V ectored interrupts on selected transfer conditions Base registers for repetitive operations Tw o independent m ulti-function channels

ADS1256

Abstract: Digital Weighing Scale PIC adc 12bit 5msps adc pic circuit diagram 2804 adc ADS1255 datasheet ads1255 OPA847 Stpd 2045 ultrasound transducer circuit driver 1mhz
Contextual Info: R E A L W O R L D S P I G N A L R O C E S S I N G ™ An Analog Product Catalog High-Speed / High-Performance ADCs 2 12-bit, 65MSPS ADC features fast, low-power operation for portable applications Fastest 16-bit, 5MSPS ∆∑ ADCs for imaging and test equipment

14A08

Abstract: AD7834 AD7834AN AD7834AR AD7834BN AD7834BR AD7834SQ AD7835
Contextual Info: a LC2MOS Quad 14-Bit DAC AD7834/AD7835 FEATURES Four 14-Bit DACs in One Package AD7834—Serial Loading AD7835—Parallel 8-/14-Bit Loading Voltage Outputs Power-On Reset Function Max/Min Output Voltage Range of +/–8.192 V Maximum Output Voltage Span of 14 V

Til 322A

Abstract: FFD11 280/Til 322A
Contextual Info: S A R A Chipset Technical Manual Segmentation SARA Hardware Description Chapter 3. Hardware Description 3.1 Segmentation SARA Hardware Description 3.1.1 Segmentation SARA Internal Block Description Figure 3-1 shows a block diagram of the Segmentation S A R A chip.

MRC D6 16A

Contextual Info: Cover Marvell PXA270 Processor Developers Manual Doc. No. MV-S301039-00 , Rev. A April 2009 Marvell. Moving Forward Faster Released PXA270 Processor Developers Manual Document Conventions Note: Provides related information or information of special importance.

SHA256

Abstract: Atmel tape and reel spec 8-lead SOIC
Contextual Info: Atmel AT88SA102S Atmel CryptoAuthentication Product Authentication Chip DATASHEET Not Recommended for New Designs Replaced by ATSHA204 Features • • • • • • • • • • • Secure authentication and key exchange Superior SHA-256 hash algorithm

DS70143B

Abstract: DS70030 DS70046 to design on paper a full 18*16 barrel shifter design CS40 diode 131DCi
Contextual Info: dsPIC30F6011A/6012A/6013A/6014A Data Sheet High-Performance Digital Signal Controllers 2005 Microchip Technology Inc. Preliminary DS70143B Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet.

sharc ADSP-21xxx architecture

Abstract: addressing modes of ADSP-210XX ADSP-210xx addressing mode ADSP-21xxx ADSP-21XXX MEMORY cc21k adsp-210XX instruction set ADSP-210xx sharc 21xxx reference manual compiler ADSP21060
Contextual Info: 2 COMPILER Contents Figure 2-0. Table 2-0. Listing 2-0. Listing 2-0. Overview The C compiler cc21k compiles ANSI standard C code for ADSP-21xxx DSP systems. A number of C language extensions in the compiler aid DSP development. This compiler runs within the VisualDSP environment or

S53 Sharp

Abstract: ram repair QFP100-P-1420 SM3512 s684
Contextual Info: SM3512 4-Bit Single-Chip Microcomputer Data Sheet FEATURES • Standby Release 2 events – 2 Hz Signal – Key Input • ROM Capacity – Program ROM 8K x 23-bits – Character ROM 5 × 9 × 128-bits – Constant ROM 208 × 4-bits • Built-in Oscillator

buzzer 5v

Abstract: QFP128-P-0828 SM3518
Contextual Info: SM3518 4-Bit Single-Chip Microcomputer Data Sheet FEATURES • Built-in Oscillator – System Clock Built-in CR Oscillator 1 kHz – System Clock (External Crystal) 1 kHz – Timer (Built-in CR Oscillator) 32.8 kHz – Timer (External Crystal) 32.768 kHz

Contextual Info: SARA Chipset Technical Manual Segmentation SARA Hardware Description Chapter 3. Hardware Description 3.1 Segmentation SARA Hardware Description 3.1.1 Segmentation SARA Internal Block Description Figure 3-1 shows a block diagram of the Segmentation SARA chip.

dsPIC30F family reference manual DS70046

Abstract: DS70046 Example codes for disabling interrupts in 6014A Family Reference Manual ds70046 DSPIC DSPIC30F6014A pwm Example codes for DISI instruction in 6014A pic32 PWM pll 022a DS70157
Contextual Info: dsPIC30F6011A/6012A/6013A/6014A Data Sheet High-Performance, 16-bit Digital Signal Controllers 2008 Microchip Technology Inc. DS70143D Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet.

buzzer circuit

Abstract: 32.768 MHZ OSCILLATOR NOT GIVING OUTPUT QFP160-P-2828 SM3513 sis8 dio8
Contextual Info: SHARP SM3513 4-Bit Single-Chip Microcomputer Data Sheet FEATURES • ROM Capacity - Program ROM 24K x 23-bits - Character ROM 6 x 8 x 256-bits - Constant ROM 1K x 4-bits • RAM Capacity - Working RAM 256 x 4-bits - Display RAM 74 x 32-bits - Data RAM 512 x 8-bits

ram 512x8

Abstract: crystal 32.768 QFP100-P-1420 SM3514
Contextual Info: SM3514 SHARP 4-Bit Single-Chip Microcomputer Data Sheet FEATURES • ROM Capacity - Program ROM 8K x 23-bits - Character ROM 5 x 9 x 128-bits • Built-in Oscillator - System Clock Built-in CR Oscillator 300 kHz - Timer (Built-in CR Oscillator) 32.8 kHz

Rom memory circuit

Abstract: crystal 32.768 ROM CMOS 8K x 8 "character rom" QFP100-P-1420 SM3512
Contextual Info: SM3512 SHARP 4-Bit Single-Chip Microcomputer Data Sheet FEATURES • ROM Capacity - Program ROM 8K x 23-bits - Character ROM 5 x 9 x 128-bits - Constant ROM 208 x 4-bits • RAM Capacity - Working RAM 256 x 4-bits - Display RAM 60 x 9-bits - Data RAM 8K x 8-bits

5 x 7 dot matrix program

Abstract: 11 pin 8 segment LcD "Single Chip Microcomputer" QFP100-P-1420 SM3503 S53 Sharp
Contextual Info: SM3503 SHARP 4-Bit Single-Chip Microcomputer Data Sheet FEATURES • ROM Capacity - Program ROM 6K x 23-bits - Character ROM 5 x 8 x 128-bits • Built-in Oscillator - System Clock Built-in CR Oscillator 250 kHz - Built-in CR Oscillator Timer 32.8 kHz - External Crystal Tim er 32.768 kHz

AT88SA102S-TSU-T

Abstract: AT88SA102S 8584F
Contextual Info: Atmel AT88SA102S Atmel CryptoAuthentication Product Authentication Chip DATASHEET Not Recommended for New Designs Replaced by ATSHA204 Features • • • • • • • • • • • Secure authentication and key exchange Superior SHA-256 hash algorithm

AN701

Abstract: 3F80 EXCESS-127
Contextual Info: Philips Semiconductors Application note SP floating point math with XA AN701 Author: Santanu Roy, MCO Applications Group, Sunnyvale, California IEEE SINGLE PRECISION FLOATING POINT ARITHMETIC WITH XA SIGN 1-bit This application note is intended to implement Single Precision

"LINK STATE"

Contextual Info: ZLAN-147 MVTX280x IP Multicast Switching Application Note Contents April 2005 1.0 Introduction 1 2.0 Design Concept 2 3.0 Hardware Implementation 3 3.1 Search Engine Behavior 3 4.0 Search Engine Data Structure Related To IP Multicast 3 4.1 CPU Commands To Add/Delete Multicast

AT88SA102S

Abstract: SHA-256 SHA256 AT88SA102S applications notes
Contextual Info: Atmel AT88SA102S Atmel CryptoAuthentication Product Authentication Chip DATASHEET Features • • • • • • • • • • • Secure authentication and key exchange Superior SHA-256 hash algorithm Best in class 256-bit key length Guaranteed unique 48-bit serial number

I960CA

Abstract: CRC10 RS8234 RS8250 on-demand multicast messages
Contextual Info: RS8234 ATM ServiceSAR Plus with xBR Traffic Management The RS8234 Service Segmentation and Reassembly Controller integrates ATM terminal functions, PCI Bus Master and Slave controllers, and a UTOPIA interface with service specific functions in a single package. The ServiceSAR Controller generates and