21JT Search Results

d2764c

Abstract: MK48Z12B-20 IMS1630 MK48Z02BU-25 VQC10 M27512F1 UPD27128D M2716F1 thomson RT 463 Schematic STR S6706
Contextual Info: m e m o r y pr o d u c ts databook SGS-THOMSON ® ® H lL Ig ? [§ © R IO (g i MEMORY PRODUCTS DATABOOK 1st E D IT IO N JUNE 1988 USE IN LIFE SUPPORT MUST BE EXPRESSLY AUTHORIZED SGS-THOM SON’ PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

M80C88

Abstract: N80C88 harris 6616 D80C88 412A11 HM-8616 M80C88-2 62C88 80C88A intel 8085 pin assignments
Contextual Info: HARRIS SENICOND SECTOR TS 4305571 D O I Q Ö ^ 0 ~ -p -H I-n -0 7 88008 80C8S HARRIS CMOS 8/16-Bit Microprocessor Features Pinout* • Com patible w ith N M O S 6088 T O P VIEW • D irect Softw are C om patibility w ith 80C 86, 8086, 80C8B M IN MODE • 8-B lt Data bus Interface; 16-B lt Internal Architecture

Contextual Info: 82C89/883 CMOS Bus Arbiter June 19 89 P ino u ts Features • This Circuit is Processed in Accordance to M il-S td -8 8 3 and is Fully Conform ant Under the Provisions of Paragraph 1.2.1. 8 2 C 8 9 /8 83 CERAMIC DIP TOP VIEW • Pin Com patible with Bipolar 8289

21JT

Abstract: c3040
Contextual Info: TMS320C30 DIGITAL SIGNAL PROCESSOR SPRS032A - APRIL 1996 - REVISED JUNE 1997 High-Performance Floating-Point Digital Signal Processor DSP - TMS320C30-50 (5 V) 40-ns Instruction Cycle Time 275 MOPS, 50 MFLOPS, 25 MIPS - TMS320C30-40 (5 V) 50-ns Instruction Cycle Time

Contextual Info: HARRIS SEMICOND SECTOR IfaE D HARRIS • 4302271 001501b 7 ■ 82C89/883 T f 3 . ■ CMOS Bus Arbiter Juñe 1989 Pinouts Features 8 2 C 8 9 /8 8 3 CERAMIC DIP TOP VIEW. • This Circuit is Processed in Accordance to M il-Std-883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1.

82C59A harris

Abstract: I82C59A 8086 hex code
Contextual Info: S3HARRIS 82C59A S E MI C O N D U C T O R REFERENCE APP NOTE 109 CMOS Priority Interrupt Controller February 1992 Features Description • 12.5MHz, 8MHz and 5MHz Versions Available - 12.5MHz Operation. 82C59A-12 - 8MHz

Contextual Info: 82C88/883 CMOS Bus Controller June 1989 P ino u ts Features 8 2 C 8 8 /8 83 CERAMIC DIP TOP VIEW • This Circuit is Processed in Accordance to M il-S td -8 8 3 and is Fully Conform ant Under the Provisions of Paragraph 1.2.1. • Com patible with Bipolar 82 83

Contextual Info: fi! H A R R IS REFERENCE APP NOTE 108 CMOS Serial Controller Interface J a n u a ry 1 9 9 2 P in o u ts F ea tures 28 LEAD DIP • Single Chip UART/BRG T O P V IE W • DC to 16M H z 1 M Baud Operation RD [ ~ r 2 8 | CS Ö |~ F 27 ] vcc • Crystal or External Clock Input

Contextual Info: HARRIS SEMICOND SECTOR ILE D ID HARRIS • 4302271 GQ15Q0S 2 ■ 82C88/883 CMOS Bus Controller June 19 89 P in o u ts Features • This Circuit is Processed in Accordance to M II-S td -8 8 3 and is Fully Conform ant Under the Provisions of Paragraph 1.2.1.

Contextual Info: HARRIS SEMICOND SECTOR IS D E ^ 4302271 Q011040 b ~|~i 7 ^ 3 ] H A R R I S If l CO O CM CMOS Static Clock Controller/Generator Features Pinouts • Generates Syatem Clocks lor CM OS or NMOS Microprocessors and Peripherals • Complete Control Over System Clock Operation for Very Low System Power