21264 Search Results

21264

Contextual Info: Alpha 21264 DIGITAL Semiconductor Alpha 21264 Microprocessor Product Brief The Alpha 21264 microprocessor, with benchmarks over 30 SPECint95 and 50 SPECfp95, and with spectacular bandwidths over 4 GB/s for L2 cache TM and over 2 GB/s for memory, enables the system designer to produce the

pc100 system board

Abstract: atx chassis design guide atx connector J11 connector mic connector UP1100 F chassis connector mb 512
Contextual Info: A Tour of UP1100 Board Fan Power Connectors Section F Alpha 21264A Processor Fan Power UP1100 Rear Panel I/O Connectors (Section I) Keyboard & Mouse (stacked) Dual USB (stacked) Parallel Quick Start Installation Guide Serial COM1 Serial COM2 LAN (Ethernet)

21264

Abstract: video server 130C samsung dvd power supply
Contextual Info: PRODUCT BRIEF Alpha 21264 Microprocessor The Alpha 21264 microprocessor, with benchmarks over 30 SPECint95 and 50 SPECfp95, and with spectacular bandwidths over 3.2 GB/s for L2 cache and over 2.6 GB/s for memory, enables the system designer to produce the highest performance systems ranging from workstations to

21264

Abstract: grid computing introduction
Contextual Info: Alpha 21264 Digital Semiconductor Alpha 21264 Microprocessor Product Brief The Alpha 21264 microprocessor, with benchmarks over 30 SPECint95 and 50 SPECfp95, and with spectacular bandwidths over 4 GB/s for L2 cache TM and over 2 GB/s for memory, enables the system designer to produce the

HDB3 matlab

Abstract: block diagram prbs generator in matlab matlab pn sequence generator HP54502A
Contextual Info: DART Device Advanced E3/DS3 Receiver/Transmitter TXC-02030 FEATURES DESCRIPTION • Single LIU for E3 and DS3 The Dual-market Advanced E3/DS3 Receiver/Transmitter DART device performs the receive and transmit line interface functions required for transmission of E3

Contextual Info: Sertopia Device UTOPIA Serializer TXC-05860 DATA SHEET PRODUCT PREVIEW The Sertopia™ TXC-05860 UTOPIA serializer is a single-chip solution for broadband communication systems. A pair of Sertopia devices interface two remote UTOPIA ports transparently across a serial link. The Sertopia emulates a

IBM "embedded dram"

Abstract: m5m4v4169 Intel 1103 DRAM Nintendo64 IBM98 toshiba fet databook dynamic memory controler MOSYS eDRAM "1t-sram" MoSys
Contextual Info: ABSTRACT MODERN DRAM ARCHITECTURES by Brian Thomas Davis Co-Chair: Assistant Professor Bruce Jacob Co-Chair: Professor Trevor Mudge Dynamic Random Access Memories DRAM are the dominant solid-state memory devices used for primary memories in the ubiquitous microprocessor systems of

82489DX AP-388

Abstract: 82489dx intel 82357 intel 82489dx
Contextual Info: 82489DX ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER 82489DX FEATURES OVERVIEW • Inter-Processor Interrupts ■ Advanced Interrupt Controller for 32-Bit Operating Systems ■ Various Addressing Schemes— Broadcast, Fixed, Lowest Priority, etc. ■ Solution for Multiprocessor Interrupt

STM CL-80

Abstract: acp ca14 AD10 AD14 TXC-05551
Contextual Info: SARA-2 ATM Cell Processing 1C Device TXC-05551 DATA SHEET PRODUCT PREVIEW DESCRIPTION Test Access Port SARA-2 is a single-chip solution using feature/ application-specific microcode that performs complete segmentation and reassembly SAR for implementing

C0402C223K5RACTU

Contextual Info: KEMET Part Number: C0402C223K5RACTU C0402C223K5RAC7867 Capacitor, ceramic, 0.022 uF, +/-10% Tol, 50V, X7R, 0402 General Information Manufacturer: Miscellaneous Electrical: KEMET Note: Referee time for X7R dielectric for this part number is 1000 hours Electrical Specifications

Motorola TE 2482

Abstract: data sheet IC 7400 IC 7400 pin diagram HP 3070 series 3 Manual zener Diode B23 data sheet ic 7495 B26 ZENER DIODE Philips 2222-370 KU 601 R64T
Contextual Info: Advisory November 1998 T7234, T7237, and T7256 Compliance with the New ETSI PSD Requirement Refer to the T7234, T7237, and T7256 ISDN transceiver data sheets. Telecommunication Standard The European Telecommunications Standards Institute (ETSI) has identified a change in the requirement of

a63a

Abstract: WD5003ABYX WD1003FBYX VPA146C3-ETS10 ST9146802SS HUA72101 HDS72161 HDT721010 HDS72202 Hitachi HUA72201
Contextual Info: Interoperability Report for MegaRAID Value and Feature 6Gb/s SAS Controllers This represents basic compatibility and is only a guide to hardware which is Known to function with the listed MegaRAID SATA+SAS controllers. Updated 09/28/10 Controllers ♦ SAS/SATA Enclosures ♦ Motherboards ♦ Hard Disk Drives ♦ Solid State Drives ♦ Cables

Contextual Info: _ ALI-25C and ALI-25T ATM Line Interface Devices for 25 Mbit/s Operation TXC-07025 Chip Set UJW33 Y ” DATA SHEET DESCRIPTION FEATURES Implements ATM-25 Mbit/s TC and PMD layer functions Supports up to 100 meters of Shielded Twisted Pair STP or Unshielded Twisted Pair types 3,

87b3

Abstract: t1b8
Contextual Info: ADMA-T1 Device Mbit/s to VT1.5/TU-11 Async Ma pper-Desync TXC-04001 B DATA SHEE T Preliminary FEATURES DESCRIPTION • Digital desynchronizer reduces systemic jitter in the presence of multiple pointer movements. A register is also provided to control the internal

I7 motherboard circuit diagram

Abstract: MOTHERBOARD CIRCUIT diagram explained
Contextual Info: t h a n S w it c h # DS3LIM-SN DS3/STS-1 Line Interface Module NRZ Clock/Data Output TXC-20153D, TXC-20153G X- DATA SHEET DESCRIPTION FEATURES • Complete B3ZS analog to NRZ digital DS3/ STS-1 line interface unit in a compact 2.6 square inch, 50-pin DIP Module

Contextual Info: DS3F Device DS3 Framer TXC-03401 DATA SHEE T FEATURES DESCRIPTION • DS3 payload access, bit-serial or nibble-parallel • C -bit parity or M 13 operating m ode • C -bit interface 13 C -bits in, 14 out • Detect and generate D S3 AIS, and idle signals

1j63

Abstract: .1J63 7062l
Contextual Info: f QE1F-PIus Device f t r H Quad E1 Framer-Plus TXC-03114 DATA SHEET DESCRIPTION The QE1F-Plus is a four-channel E1 2048 kbit/s framer designed for voice and data communications applications. A dual unipolar or NRZ line interface is supported with full alarm detection and generation per

gi 08d

Contextual Info: QE1M D evice Quad E1 Mapper TXC-04252 DATA SHEET PRODUCT PREVIEW F FEATURES DESCRIPTION • Add/drop four 2.048 Mbit/s signals from an STM-1 VC-4, STS-3/AU-3, or an STS-1 • Independent add and drop bus timing modes • Selectable HDB3 positive/negative rail or NRZ

Contextual Info: L3M Device Level 3 Mapper TXC-03452B DATASHEET FEATURES DESCRIPTION = The L3M maps a DS3 line signal into an STM-1 TUG-3 or STS-3/STS-1 SPE or STS-1 SPE SDH/SONET sig­ nal. An E3 line signal is mapped into an STM-1 TUG-3 signal only. The L3M provides a TUG-3 formatted signal

22-bit

Contextual Info: S A R A II Segmentation and Reassembly Device TXC-05551 DATA SH EE T PRODUCT PREVIEW FEATURES DESCRIPTION • Full duplex segmentation and reassembly ot multiple VCs up to 155 Mbit/s in each direction • Integrated SONET/SDH 155.52 Mbit/s framer. • Optional 8-bit UTOPIA interface

Contextual Info: Data Sheet January 1998 m icroelectronics group Lucent Technologies Bell Labs Innovations T7256 Single-Chip NT1 SCNT1 Transceiver Features • U- to S/T-interface conversion for ISDN basic rate (2B+D) systems — Integrated U- and S/T-interfaces — Operates in stand-alone mode to provide U- and

TRANSISTOR SE 135

Contextual Info: DS2125 Ultra3 LVD/SE SCSI 15-Line Terminator www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS2125 Ultra3 LVD/SE SCSI terminator is both a low-voltage differential LVD and single-ended (SE) terminator. The multimode operation enables the designer to implement LVD in current products

TTD10

Abstract: CS2180 N1175
Contextual Info: CDB Device Cell Delineation Block TXC-05150 DATA SHEET Preliminary DESCRIPTION The Cell Delineation Block CDB is an ATM cell interface device. The CDB function is to extract ATM cells from, and insert ATM cells into, a line interface signal having one of several possible transmission formats.

M24236

Abstract: M24236/1 SAE-AS58091 SAE-AS7928 SAE-AS25244 m24236/13 ASTM-B545 class A Mil-prf-24236/1 ISO10012-1 SAE-AS-7928
Contextual Info: The prohibition of pure Tin paragraph 3.4.2.2 will go into effect on 1 July 2006. INCH-POUND MIL-PRF-24236D 5 April 2006 SUPERSEDING MIL-PRF-24236C 3 September 1999 PERFORMANCE SPECIFICATION SWITCHES, THERMOSTATIC, (METALLIC AND BIMETALLIC), GENERAL SPECIFICATION FOR