20JVC Search Results

ls374

Abstract: 74LS574 74LS574DC 74LS574 specifications 54LS574DM 54LS574FM 74LS574FC 74LS574PC
Contextual Info: 574 54LS/74LS574 // A C O N N E C T IO N D IA G R A M P IN O U T A O C TA L D -TYPE FLIP-FLO P 20Jvc O E ^ (With 3-State Outputs Do [2 tä |0 o O'Œ □ 2 [T □3[7 täjoi ït 04 [ ? D E S C R IP T IO N — T h e ’574 is a hig h speed lo w p o w e r o cta l flip -flo p w ith a

alj 13003

Abstract: HF 13003 BTS 308 PC 13003 sw 13003 54HC245 smd marking 1331 sot diode pj 87 tyn 208 S70 SMD
Contextual Info: r M I L-M-38510/655 30 S e p t e m b e r 1986 MILITARY SPECIFICATION O M I C R O C I R C U I T S , D I G T T A L , H I G H S P E E D , CMOS, BU S TRANSC E I V E R S ' , W I TH T H R E E - S T A T E O U T P U T S , ‘ MONOLITHIC SILICON T h i s s p e c i f i c a t i o n is a p p r o v e d for use by all D e p a r t ­

74LS340

Abstract: 74ls310 74ls344 74LS210 74LS341 74S210 74L310 ls344 74LS31 74s310
Contextual Info: 8-Bit Buffers with Schmitt Trigger Inputs Features S N 5 4 /7 4 L S 3 1 0 S N 5 4 /7 4 S 3 1 0 S N 5 4 /7 4 L S 3 4 0 S N 5 4 /7 4 S 3 4 0 S N 5 4 /7 4 L S 3 4 1 S N 5 4 /7 4 S 3 4 1 S N 5 4 /7 4 L S 3 4 4 S N 5 4 /7 4 S 3 4 4 Ordering Information • Schmitt-trigger Inputs guarantee high noise margin

ir 10681

Contextual Info: First-In First-Out FIFO 64x5 Memory 15 MHz (Cascadable) Features/B enefits • High-speed 15 MHz shlft-ln/shHt-out rates • High drive capability • Low-power consumption C 67L 4033D Ordering Inform ation PART NUMBER PKG TEMP DESCRIPTION C67L4033D N,J

Contextual Info: 74HC/HCT4352 MSI DUAL 4-CHANNEL ANALOG M U LTIPLEXER/DEM U LTIPLEXER W ITH LATCH F E A TU R E S • • • • • • • TYPICAL Wide analog input voltage range: + 5V Low “ O N " resistance: 80 a typ. at V c c - V EE = 4.5 V 70 i2 (typ.) at V q £ — V EE = 6 .0 V

PAL16L8 programming algorithm

Abstract: PAL Decoder 16L8 PAL16L8 programming specifications me 555 16L8D PAL16L8 PAL16L8A PAL16L8B PAL16L8D PAL16R4A-2
Contextual Info: Programmable Array Logic PAL 20-Pin Medium PAL Family General Description The 20-pin Medium PAL family contains four of the most popular PAL architectures used in industry. National Semi­ conductor’s advanced Schottky TTL process with titanium tungsten fusible links is used in manufacturing the standard,

S734

Abstract: 74S734 74S730 dram 64kx1 64kx1 am2965 SN74S734 S240 S730 S7301
Contextual Info: 8 -B it Dynam ic-RAM D river w ith Three-state Outputs S N 5 4 /7 4 S 7 3 0 /-1 S N 5 4 /7 4 S 7 3 4 /-1 Ordering Information Features/ Benefits • Provides MOS voltage levels for 16K and 64K DRAMs • Undershoot of low-going output is less than -0 .5 V PART

PAL16LB

Abstract: PAL16L8 programming algorithm PAL16L8B-2 PAL16R6A2 pal16l8a-2 PAL16L8B PAL16R4A-2
Contextual Info: Semiconductor Programmable Array Logic PAL 20-Pin Medium PAL Family General Description The 20-pin Medium PAL family contains four of the most popular PAL architectures used in industry. National Semi­ conductor’s advanced Schottky TTL process with titanium

TA31065

Abstract: ta31065n 31033P ta 31033P beep 31065N
Contextual Info: SPEECH NETWORK ICs SPEECH NETWORK FOR TELEPHONE FEA TU R ES • D irect in terface w ith lig h t and com pact ceram ic tran sm itter-receiver is possible. • • Receiver o f lo w im p e d an ce type can also be used. Lo w o p e ra tin g v o lta g e p rovides an e xce llen t branch

PAL16R4A-2

Contextual Info: NATL SEMICOND MEMORY b S O l l E b OQbMDIti b 31E D Programmable Array Logic (PAL ) 20-Pin Medium PAL Famiiy General Description The 20-pin Medium PAL family contains four of the most popular PAL architectures used in industry. National Semi­ conductor's advanced Schottky TTL process with titanium