2,048MHZ Search Results

Contextual Info: T O S H IB A TMPZ84C711A ISDN BASIC RATE INTERFACE CONTROLLER OVERVIEW The LSI chip set for the ISDN basic rate interface supplies the layer 3 protocol control , layer 2 and layer 1 control functions which are part of the basic rate interface (2B + D) call control functions for ISDN terminals.

MT9076

Abstract: 7ga6
Contextual Info: MT9076 T1/E1/J1 3.3V Single Chip Transceiver Preliminary Information Features • The MT9076 is a highly featured single chip solution for terminating T1/E1/J1 trunks. It contains a longhaul LIU, an advanced framer, a high performance PLL, and 3 HDLCs. In T1 mode, the MT9076 supports D4, ESF and

2SA1015

Abstract: samsung rfs KM29N1600T KM29N040T MA11 TP3054 W55412A W62410
Contextual Info: Preliminary W62410 DSP CONTROLLER FOR TAD GENERAL DESCRIPTION The W62410 chip is a digital speech signal processor. The W62410 implements the STREAMTALK speech compression, voice prompt processing, telephone line signal processing, AFlash and DRAM memory management and 16 I/O lines all in one chip for a fully digital answering machine. The

zilog 3943

Abstract: TA32032F decade counter timimg diagram 5430 TI 05H zilog 3818 TMPZ84C710 EOW channel LSE B3 transformer LSE B4 transformer toshiba line output transformers
Contextual Info: TMPZ84C711A T O SH IB A ISDN BASIC RATE INTERFACE CONTROLLER OVERVIEW The LSI chip set for the ISD N basic rate interface supplies the layer 3 protocol control , layer 2 and layer 1 control functions w hich are part of the basic rate interface (2B + D) call control functions for ISD N term inals.

dbr diode

Abstract: A2F8
Contextual Info: April 1997 ERICSSON ^ PBA 3369/1 Dual Channel Complete Line Interface Circuit, DCLIC Key Features Description The PBA 3369/1 is a Dual Channel Complete Line Interlace Circuit DCLIC manufactured in thick-film technology. The PBA 3369/1 Dual CLIC consists of two Ericsson SLIC's, two Combo 2 Codecs

Digital Alarm Clock by ttl

Abstract: Digital Alarm Clock on ttl G-737 M7418
Contextual Info: SA2030 sames SA2030 PCM FRAME ALIGNER FEATURES n Frame Alignment Recovery and loss in accordance with CCITT recommendations G.732 and G.737 n Indication of Slip, loss of frame synchronisation, and loss of route clock conditions. n Jitter and phase-wander immunity

Contextual Info: Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Developer’s Manual June 2004 Document Number: 252480-004 Intel® IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Contents INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. EXCEPT AS PROVIDED IN INTEL'S TERMS

18dBmin

Contextual Info: TDP VIEW 1 • 1,41 P8 TTIP TRING 1 I 1.41 RTIP P2 RRING ELECTRICAL SPECIFICATIONS! NDTES 1.0 TURNS RATIO P3-P1) ■ (J 2 -J 1 ) (P 7 -P 5 ) i ( J 5 -J 4 ) I 1 I 1,41 ± 3 / 2.0 INDUCTANCE (P3-P1) j (P 7 -P 5 ) ■ 1.2mH MIN, g 0,1V, lOOKHz 3.0 LEAKAGE INDUCTANCE P3-P1 (WITH J2 AND J1 SHDRT)

T5620

Abstract: XR-T5600 XR-T5620
Contextual Info: ZTEXAR XR-T5600/T5620 Triple ALBO PCM Repeater GENERAL DESCRIPTION PIN ASSIGNMENT The XR-T5600/T5620 is a bipolar monolithic repeater 1C designed for PCM carrier systems operating at 1.544 MBPS T1 , 2 MBPS, or 2.37 MBPS (T148C). it provides all of the active circuits required for one side of a PCM

Contextual Info: 1 P7> © © © © © 1 ! 2,42 © ELECT R ICAL SPECIFICATIONS: 1.0 TURNS RATID (P 3 -P 1 ; ( J 2 -J 1 ) (P 7 -P 5 ) i ( J 5 - J 4 ) 2.0 INDUCTANCE (P 3 -P 1 ) j (P 7 -P 5 ) 3.0 LEAKAGE INDUCTANCE P 3 -P 1 (WITH J 2 AND J1 SHDRT) P 7 -P 5 (WITH J 5 AND J 4 SHDRT)

Contextual Info: BACK SA2030 sames SA2030 PCM FRAME ALIGNER FEATURES n Frame Alignment Recovery and loss in accordance with CCITT recommendations G.732 and G.737 n Indication of Slip, loss of frame synchronisation, and loss of route clock conditions. n Jitter and phase-wander immunity

South African Micro Electronic Systems

Abstract: tsx micro SA8702
Contextual Info: SA8702 sames SA8702 BLOCK MODE TIME SLOT ALLOCATION CIRCUIT DESCRIPTION The SA8702 BMTSAC is a Block Mode Time Slot Allocation Circuit. The device is used to generate 8 consecutive timeslots in one of 4 blocks in a 32 time-slot PCM system. Each timeslot pulse is 8 BLCK

2SA1015

Abstract: samsung rfs KM29N040T MA11 TP3054 W55412A W62410
Contextual Info: Preliminary W62410 DSP CONTROLLER FOR TAD GENERAL DESCRIPTION The W62410 chip is a digital speech signal processor. The W62410 implements the STREAMTALK speech compression, voice prompt processing, telephone line signal processing, AFlash and DRAM memory management and 16 I/O lines all in one chip for a fully digital answering machine. The

Contextual Info: XR-T5720 PCM Line Repeater PIN ASSIG NM ENT G EN E R A L DESCRIPTION The XR-T5720 is a bipolar monolithic repeater 1Cthat pro­ vides all the active circuits required for one side of a PCM repeater. The 1Cis designed for dock extraction by using a crystal filter.

pcm robbed bit slots symbols

Abstract: MT9076B MT9076 PUB43801 SLC96 TR-62411 G964
Contextual Info: MT9076B T1/E1/J1 3.3V Single Chip Transceiver Preliminary Information Features • Description The MT9076 is a highly featured single chip solution for terminating T1/E1/J1 trunks. It contains a longhaul LIU, an advanced framer, a high performance PLL, and 3 HDLCs.

M3MA

Contextual Info: KT85S5 TIME SLOT ASSIGNMENT CIRCUIT INTRODUCTION 20-CERDiP The KT6555 is a per channel Time Slot Assignment Circuit TSAC that produces 8-bit receive and transmit time slots for four 1 CHIP CODEC. Each frame synchronization pulse may be independently assigned to a time slot in a frame of up to 84 time slots.

ITU-T G964

Abstract: MT9076 MT9076B MT9076BB MT9076BP PUB43801 TR-62411 G964 SF 128 D EQUIVALENT cd 1031 cs
Contextual Info: MT9076B T1/E1/J1 3.3V Single Chip Transceiver Data sheet Features • Description The MT9076 is a highly featured single chip solution for terminating T1/E1/J1 trunks. It contains a long-haul LIU, an advanced framer, a high performance PLL, and 3 HDLCs. In T1 mode, the MT9076 supports D4, ESF and

T5720

Contextual Info: Z*EXAR XR-T5720 PCM Line Repeater PIN ASSIGNMENT GENERAL DESCRIPTION The XR-T5720 is a bipolar monolithic repeater 1C that pro­ vides all the active circuits required for one side of a PCM repeater. The 1Cis designed for clock extraction by using a crystal filter.

M6219

Abstract: TSX 7
Contextual Info: BACK SA8702 sames PRELIMINARY SA8702 BLOCK MODE TIME SLOT ALLOCATION CIRCUIT DESCRIPTION The SA8702 BMTSAC is a Block Mode Time Slot Allocation Circuit. The device is used to generate 8 consecutive timeslots in one of 4 blocks in a 32 time-slot PCM system. Each timeslot pulse is 8 BLCK

9013H

Contextual Info: MT9076 T1/E1/J1 3.3V Single Chip Transceiver Preliminary Information Features • The MT9076 is a highly featured single chip solution for terminating T1/E1/J1 trunks. It contains a longhaul LIU, an advanced framer, a high performance PLL, and 3 HDLCs. In T1 mode, the MT9076 supports D4, ESF and

psm7

Contextual Info: MT9076B T1/E1/J1 3.3V Single Chip Transceiver Data sheet Features • The MT9076 is a highly featured single chip solution for terminating T1/E1/J1 trunks. It contains a long-haul LIU, an advanced framer, a high performance PLL, and 3 HDLCs. In T1 mode, the MT9076 supports D4, ESF and

Contextual Info: MT9076B T1/E1/J1 3.3V Single Chip Transceiver Preliminary Information Features • The MT9076 is a highly featured single chip solution for terminating T1/E1/J1 trunks. It contains a longhaul LIU, an advanced framer, a high performance PLL, and 3 HDLCs. In T1 mode, the MT9076 supports D4, ESF and SLC96 formats meeting the latest recommendations

MRC D6 16A

Abstract: delta wireless doorbell B1565 transistor delta wireless doorbell IC 501 B1565 IXP400 b1566 IXP425 ldr t 9060 IXP422
Contextual Info: Intel IXP42X Product Line of Network Processors and IXC1100 Control Plane Processor Developer’s Manual September 2006 Order Number: 252480-006US INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR

fuses

Abstract: RXA10 MT9076 MT9076AB MT9076AP PCM30 PUB43801 TR-62411 ec158 AC064
Contextual Info: MT9076 T1/E1/J1 3.3V Single Chip Transceiver Preliminary Information Features • The MT9076 is a highly featured single chip solution for terminating T1/E1/J1 trunks. It contains a longhaul LIU, an advanced framer, a high performance PLL, and 3 HDLCs. In T1 mode, the MT9076 supports D4, ESF and