1M1N Search Results

Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT M>D42S16800,4216800,42S17800,4217800 16 M BIT DYNAMIC RAM 2 M-WORD BY 8-BIT, FAST PAGE MODE DESCRIPTION ★ The MPD42S16800, 4216800, 42S17800, 4217800 are 2 097 152 words by 8 bits dynamic CMOS RAMs. These differ in refresh cycle and the //PD42S16800, 42S17800 can execute CAS before RAS self refresh.

NEC 4216160

Contextual Info: MOS INTEGRATED CIRCUIT f iPD42S16160,4216160,42S18160,4218160 16 M -BIT DYNAM IC RAM 1 M -W ORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE DESCRIPTION The mPD42S16160, 4216160, 42S18160, 4218160 are 1 048 576 words by 16 bits dynamic CMOS RAMs. These differ in refresh cycle and the /iPD42S16160, 42S18160 can execute CAS before RAS self refresh (see

Contextual Info: SHEET 1 OF 7 NOTES: 1 7 .BO [- 7 0 1 ]- 1 ALL DIMENSIONS 2 GENERAL TOLERANCE: X.X = ± 0 .4 IN MM [INCH] X xx = ±0.25 3. TERM. NOS. FOR REFERENCE ONLY. a.50 B 15.00 [.5 9 1 ] ^ 4. RATING: 7 A S 125 V , 4 A 2 5 0 [.3 3 5 ] L j VUL.CUL. & VDE APPROVED 5. CONTACT MATERIAL;

Multibus ii protocol

Abstract: Multibus arbitration protocol
Contextual Info: TOSHIBA INTEGRATED CIRCUIT BAC 8 4 1 1 0 TE C H N IC A L D A T A BAC Bus Arbiter/Controller GENERAL DESCRIPTION The MULTIBUS II Bus Arbiter/Controller (BAC) is an 84-pin, CMOS component that embodies the Arbitration and system control line functions of the MULTIBUS II

ssfdc tc

Abstract: TC58V32ADC fDC22A a7611
Contextual Info: T O S H IB A TC58V32ADC TENTATIVE 3 2 M b it TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT 4 M X 8 b it SILICON GATE CMOS C M O S N A N D E2 P R O M (4 M BYTE S m a r t M e d ia ) DESCRIPTION The TC58V32ADC device is a single 3.3 volt 32 M (34,603,008) bit NAND Electrically Erasable and

MD8259A

Abstract: mr8259a MD8259A/B md8259 D-10 5962-8751801XX 5962-87518
Contextual Info: REVISIONS LTR DATE Y R -W O -D A DESCRIPTION Add parameter I LIR to ta b le I . Change drawing CAGE code. Remove vendor CAGE 34335. APPROVED 1989 MAR 01 E d ito r ia l changes th roughout. CURRENT CAGE CODE 67268 REV SHEET REV SHEET REV STATUS OF SHEETS

bta1b

Abstract: ANI 1015 1N3064 1N916 binary multiplier
Contextual Info: f MI L - M- 3 8 5 1 0 / 3 1 8 A 9 August 1983 SUPERSEDI NG MI L - M- 3 8 5 1 0 / 3 1 8 USAF 20 A p r i l 1979 MI L I T ARY S P E C I F I C A T I O N MI C R OC I R C U I T S , D I G I T A L , LOW POWER SCHOTTKY T T L , BI NARY MU L T I P L I E R , MONOLI THI C S I L I C ON