1K X 4 Search Results

IR5L

Abstract: PLCC-44 cr16 AR10-AR0 CMOS 16-Bit Priority Encoder QS761480 QS762470 44-PIN MU9C1 ST27-ST16 0804H
Contextual Info: QS761480, QS762470 High-Speed CMOS 1k x 64, 2k x 64 Content-Addressable Memory QCAM QUALITY Associative Processor SEMICONDUCTOR, INC. Q QS761480 QS762470 FEATURES DESCRIPTION • 1k/2k x 64 CAM architecture The QS761480 and QS762470 is a family of 1k and

Contextual Info: CMOS ASYNCHRONOUS FIFO WITH RETRANSMIT 1K X 9, 2K X 9, 4K X 9 IDT72021 IDT72031 IDT72041 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • First-1n/First-Out Dual-Port memory • Bit organization - IDT72021— 1K x 9 - IDT72031— 2K x 9 - IDT72041— 4K x 9

LDS 4201

Contextual Info: fax id: 5409 CY7C4421 /4201/4211/4221 CY7C4231/4241/4251 C'i- 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs Features Functional Description High-speed, low-power, first-in, first-out FIFO memories 64 x 9 (CY7C4421) 256 x 9 (CY7C4201) 512 x 9 (CY7C4211) 1K x 9 (CY7C4221)

Contextual Info: CY7C4421 /4201 /4211/4221 CY7C4231 /4241 /4251 CYPRESS 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs Features 64 x 9 CY7C4421 256 x 9 (CY7C4201 ) 512 x 9 (CY7C4211) 1K x 9 (CY7C4221 ) 2K x 9 (CY7C4231) 4K x 9 (CY7C4241 ) 8K x 9 (CY7C4251) High-speed 100-MHz operation (10 ns read/write cycle

Contextual Info: fax id: 5409 CY7C4421 /4201 /4211/4221 CY7C4231 /4241 /4251 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs Features Functional Description High-speed, low-power, first-in, first-out FIFO memories 64 x 9 (CY7C4421) 256 x 9 (CY7C4201) 5 1 2 x 9 (CY7C4211 ) 1K x 9 (CY7C4221 )

CY7C4205

Abstract: CY7C4215 CY7C4225 CY7C4235 CY7C4245 CY7C42X5 CY7C4425
Contextual Info: fax id: 5410 1CY 7C42 25 CY7C4425/4205/4215 CY7C4225/4235/4245 64, 256, 512, 1K, 2K, 4K x 18 Synchronous FIFOs Features • High-speed, low-power, first-in first-out FIFO memories • 64 x 18 (CY7C4425) • 256 x 18 (CY7C4205) • 512 x 18 (CY7C4215) • 1K x 18 (CY7C4225)

CY7C425

Abstract: CY7C419 CY7C421 CY7C429 CY7C433 IDT7200 IDT7201 IDT7202 IDT7203 C4203
Contextual Info: 19/21/25/29/ CY7C419/21/25/29/33 256/512/1K/2K/4K x 9 Asynchronous FIFO Features • • • • • • • • • • • • • • • Asynchronous first-in first-out FIFO buffer memories 256 x 9 (CY7C419) 512 x 9 (CY7C421) 1K x 9 (CY7C425) 2K x 9 (CY7C429)

C1303

Abstract: CY7C131 CY7C130 CY7C140 CY7C141
Contextual Info: 40 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power

DATASHEET AM7202

Abstract: 7C41930 CY7C425-40PC c420 diode CY7C429-15JI CY7C419 CY7C421 CY7C425 AM7204 CY7C433
Contextual Info: /25/29/ CY7C419/21/25/29/33 256/512/1K/2K/4K x 9 Asynchronous FIFO Features • • • • • • • • • • • • • • • Asynchronous first-in first-out FIFO buffer memories 256 x 9 (CY7C419) 512 x 9 (CY7C421) 1K x 9 (CY7C425) 2K x 9 (CY7C429)

52212HR

Abstract: IN3064 256X4 ncr 400 256x4 static ram
Contextual Info: C 52212 R 1K BIT 2 5 6 x 4 NVRAM 1K Bit Static RAM backed by 1K Bit Electrically Erasable PROM Fully 5V Only Operation Directly TTL Compatible In Circuit E2PROM Changes SRAM Cycle Time less than 300 ns • • • • Power-Failure Protection Unlimited Recall Cycles

CY7C4801

Abstract: CY7C4811 CY7C4821 CY7C4831 CY7C4841 CY7C4851 IDT72801 QA08 IDT728X1
Contextual Info: 4831/4 CY7C4801/4811/4821 CY7C4831/4841/4851 256/512/1K/2K/4K/8K x9 x2 Double Sync FIFOs Features • Double high speed, low power, first-in first-out FIFO memories • Double 256 x 9 (CY7C4801) • Double 512 x 9 (CY7C4811) • Double 1K x 9 (CY7C4821)

L8C201NC15

Abstract: L8C201NC25
Contextual Info: L8C201/202/203/204 L8C201/202/203/204 DEVICES INCORPORATED 512/1K/2K/4K x 9-bit Asynchronous FIFO 512/1K/2K/4K x 9-bit Asynchronous FIFO DEVICES INCORPORATED FEATURES DESCRIPTION ❑ First-In/First-Out FIFO using Dual-Port Memory ❑ Advanced CMOS Technology

8C211

Abstract: TD1011 L8C211JC25 L8C211JC50 f1f9 25TCYC IDT722X1 8C21
Contextual Info: L8C211/221/231/241 L8C211/221/231/241 DEVICES INCORPORATED 512/1K/2K/4K x 9-bit Synchronous FIFO 512/1K/2K/4K x 9-bit Synchronous FIFO DEVICES INCORPORATED DESCRIPTION The L8C211, L8C221, L8C231, and L8C241 are synchronous dual-port First-In/First-Out FIFO memories.

AL5DA002

Abstract: AL5DA003 AL5DA132
Contextual Info: AverLogic Technologies Corp. Asynchronous Dual Port Static RAM AL5DAxxxx-Selection Guide VCC NO Part number Configuration Arbitration Logic Busy Interrupt Semaphore M/S mode 1. AL5DA002-x-30-J52 1K x 8 V V M 2. AL5DA002-x-30-PF64 1K x 8 V V M 3. AL5DA002-x-30-TF64

high level block diagram for asynchronous FIFO

Abstract: L8C201PC25
Contextual Info: L8C201/202/203/204 L8C201/202/203/204 DEVICES INCORPORATED 512/1K/2K/4K x 9-bit Asynchronous FIFO 512/1K/2K/4K x 9-bit Asynchronous FIFO DEVICES INCORPORATED DESCRIPTION ❑ Advanced CMOS Technology ❑ High Speed — to 10 ns Access Time ❑ Asynchronous and Simultaneous

256K x 8 SRAM CY7C128A SRAM

Abstract: 5962-86705 PLD28 5962-89935 pld20ra10 5962-89598 CY7C132 cy7c291 PLD20RA PLDC20G10
Contextual Info: Military Product Selector Guide Static RAMs Size Organization Pins DIP SMD Number Part Number Speed (ns) ICC/ISB/ICCDR (mA @ ns) 883 Availability 1K 256 x 4 22 CY7C122 5962-88594 tAA = 25, 35 90 @ 25 Now 4K 1K x 4—Separate I/O 24S CY7C150 5962-88588 tAA = 25

SH67P33CX

Contextual Info: SH67P33C OTP 1K 4-bit Micro-controller Features SH6610C-Based Single-Chip 4-bit Micro-Controller ROM: 1K X 16 bits RAM: 80 X 4 bits - 32 System Control Register - 48 Data memory Operation Voltage: 1.8V - 3.6V Typically 3.0V 16 CMOS Bi-directional I/O pins and 1 CMOS input pin

52001HR

Abstract: IN3064 1K x 4 static ram ttl
Contextual Info: 52001 H 1K BIT 128 x 8 NVRAM Q 1K Bit Static RAM backed by 1K Bit Electrically Erasable PROM Fully 5V Only Operation Directly TTL Compatible In Circuit EEPROM Changes SRAM Cycle Time less than 300 ns Power-Failure Protection Unlimited Recall Cycles Memory Margining Capability

SH66K33A

Contextual Info: SH66K33A MASK 1K 4-bit Micro-controller Features SH6610C-Based Single-Chip 4-bit Micro-Controller ROM: 1K X 16 bits RAM: 80 X 4 bits - 32 System Control Register - 48 Data memory Operation Voltage: 1.8V - 3.6V Typically 3.0V 16 CMOS Bi-directional I/O pins and 1 COMS input pin

Contextual Info: MT52C9010 1K x 9 FIFO ['•'IICRON FIFO 1K x 9 FIFO FEATURES Very high speed: 1 5,20, 25 and 35ns access High-performance, low-power CMOS process Single +5V ±10% supply Low power: 5m W typ. standby ; 350mW typ. (active) TTL compatible inputs and outputs

Contextual Info: fax id: 5200 CY7C130/CY7C131 CY7C140/CY7C141 W CYPRESS 1K x 8 Dual-Port Static Ram Features Functional Description True Dual-Ported memory cells which allow simulta­ neous reads of the same memory location 1K x 8 organization 0.65-micron CMOS for optimum speed/power

Contextual Info: SH67P33C OTP 1K 4-bit Micro-controller Features „ SH6610C-Based Single-Chip 4-bit Micro-Controller „ ROM: 1K X 16 bits „ RAM: 80 X 4 bits - 32 System Control Register - 48 Data memory „ Operation Voltage: 1.8V - 3.6V Typically 3.0V „ 16 CMOS Bi-directional I/O pins and 1 CMOS input pin

CY7C130

Abstract: CY7C131 CY7C140 CY7C141
Contextual Info: CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 15 ns

C1307

Abstract: cY7c131 I CY7C130 CY7C131 CY7C140 CY7C141 C130-15 C1303 C13017
Contextual Info: fax id: 5200 1CY 7C14 0 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static Ram Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power