1C23 Search Results

TTC-1C23-002

Contextual Info: TTC-1C23-002 1 x 9 Fiber Optic Transceiver for Fast Ethernet, FDDI, ATM/SONET/SDH FEATURES: • Compatible with 1300 nm optical links. • Designed for 155 Mbps ATM ; 100 Mbps Fast Ethernet • Industry standard 1 × 9 package footprint. • Duplex SC connector.

TTC-1C23-300

Contextual Info: TTC-1C23-300 1 x 9 Fiber Optic Transceiver for Fast Ethernet, FDDI, ATM/SONET/SDH FEATURES: • Compatible with 1300 nm optical links. • Designed for 155 Mbps ATM ; 100 Mbps Fast Ethernet • Driving up to 2 km for multimode optical fiber. • Industry standard 1 × 9 package footprint.

TTC-1C23-300

Contextual Info: TTC-1C23-300 1 x 9 Fiber Optic Transceiver for Fast Ethernet, FDDI, ATM/SONET/SDH FEATURES: • Compatible with 1300 nm optical links. • Designed for 155 Mbps ATM ; 100 Mbps Fast Ethernet • Driving up to 2 km for multimode optical fiber. • Industry standard 1 × 9 package footprint.

TTC-1C23-002

Contextual Info: TTC-1C23-002 1 x 9 Fiber Optic Transceiver for Fast Ethernet, FDDI, ATM/SONET/SDH FEATURES: • Compatible with 1300 nm optical links. • Designed for 155 Mbps ATM ; 100 Mbps Fast Ethernet • Industry standard 1 × 9 package footprint. • Duplex SC connector.

446H

Abstract: IR 1836 3v 30E2H 18AF 3310h 3310H transistor 3A0F bridge marking Z6 SDH 209 PM5363
Contextual Info: PM5363 TUPP+622 TUPP+622 DATASHEET PMC-1981421 ISSUE 4 SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S INTERFACES PM5363 TUPP+622 SONET/SDH TRIBUTARY UNIT PAYLOAD PROCESSOR FOR 622 MBIT/S INTERFACES DATASHEET RELEASED ISSUE 4: JULY 2000 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

IT8512E

Abstract: IT8512 IT8301 ITE IT8512 CIR
Contextual Info: IT8512E/F Embedded Controller Preliminary Specification 0.4.1 ITE TECH. INC. Specification subject to Change without notice, AS IS and for reference only. For purchasing, please contact sales representatives. Copyright 2006 ITE Tech. Inc. This is Preliminary document release. All specifications are subject to change without notice.

56F800E

Abstract: oen 8613 40 21 13 345 03 05 str 6756 diagram b274 MC56F803x B174 "advanced CMOS" handbook transistor b228 TSMC SST relaxation oscillator
Contextual Info: 56F802X and 56F803X Peripheral Reference Manual 16-Bit Digital Signal Controllers DSC MC56F80XXRM Rev. 1 11/2006 freescale.com Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. This product incorporates SuperFlash technology licensed from SST.

mx Z015

Abstract: 0x09D6 nd-152 ND151 auxiliary contact SK11 DANUBE ski mx 1AC5 GEN51 able mx 1608 RX
Contextual Info: S4805CBI11 DANUBE Datasheet Revision 1.10 February 4, 2003 AMCC Dear customer, Thank you for choosing an AMCC device. We appreciate your confidence in our products. To ensure your complete satisfaction with our products and technologies, we have prepared this

sandisk emmc 4.5

Abstract: sandisk eMMC 4.41 emmc controller sandisk emmc emmc 4.41 spec emmc spec circuit diagram sandisk 64 mb hitachi eMMC eMMC 4.51 sandisk micro sdhc
Contextual Info: TMS320C5535/34/33/32 Ultra-Low Power DSP Technical Reference Manual Literature Number: SPRUH87 August 2011 2 Copyright 2011, Texas Instruments Incorporated SPRUH87 – August 2011 Submit Documentation Feedback Contents . 33

SiT9121

Contextual Info: SiT9121 1-220 MHz High Performance Differential Oscillator The Smart Timing Choice The Smart Timing Choice Features Applications  Any frequency between 1 MHz and 220 MHz accurate to 6 decimal places  10GB Ethernet, SONET, SATA, SAS, Fibre Channel,

SiT9121

Contextual Info: SiT9122 220-625 MHz High Performance Differential Oscillator The Smart Timing Choice The Smart Timing Choice Features Applications  Any frequency between 220 MHz and 625 MHz accurate to 6 decimal places  10GB Ethernet, SONET, SATA, SAS, Fibre Channel,

1C230L

Abstract: PSMN1R2-30YLC JESD22-A115
Contextual Info: LF PA K PSMN1R2-30YLC N-channel 30 V 1.25mΩ logic level MOSFET in LFPAK using NextPower technology Rev. 1 — 3 May 2011 Product data sheet 1. Product profile 1.1 General description Logic level enhancement mode N-channel MOSFET in LFPAK package. This product is

Contextual Info: Product Folder Sample & Buy Technical Documents Tools & Software Support & Community TMS320C5517 SPRS727C – AUGUST 2012 – REVISED APRIL 2014 TMS320C5517 Fixed-Point Digital Signal Processor 1 Device Overview 1.1 Features 1 • CORE: – High-Performance, Low-Power, TMS320C55x

IT8511

Abstract: IT8512 IT8510 IT851 IT85 APM 6658 IT858 IT8511E 710419 8042 keyboard matrix 16*8
Contextual Info: IT8511E/TE/G Embedded Controller Preliminary Specification 0.4.1 ITE TECH. INC. Specification subject to Change without notice, AS IS and for reference only. For purchasing, please contact sales representatives. Copyright 2006 ITE Tech. Inc. This is Preliminary document release. All specifications are subject to change without notice.

Contextual Info: IC 234 Series Characteristics Insulation Resistance: Withstanding Voltage: 1,000MQminimum at 100 VDC Contact Resistance: Operating Temperature: 30mQ max. at 10mA/20mV (Initial) -40'C ~ +150'C 100 VAC for 1 minute (M a te ria p PEI (Glass Filled) Beryllium Copper

Contextual Info: 1 1 234567381 • • • • • • • • • • • • • • • • • • 9A574BCDE31DF651A543174F3111DF1 65651145111 !1"4#$1 %&'1 D73 5D31*+,*-.1."AD4F51 /1"DFD"6"1A4E17306D73E1 1C123D251B1$33415$""61"4#$1

Contextual Info: 1 1111111111111 111111 1 1111111111111 1 1111111111111 1 1111111111111 1 1 8123456788896AB78CDEDFD8C 8 888 8 88888888 88 88888888 8 8 D8F 888 88FF8C8CDC88F D!8D89"#8F  9DEB3$8%8&' 3 %*+8&'($8,26-8,C$8FF8 )%8DDEDC

WPC8763L

Abstract: wpc8763ldg rtm875n-606 SC10U6D3V5KX-1GP PDTC124EU-1-GP max8731AE G792SFUF-GP P2003EVG RTM875 isl6262acrz
Contextual Info: 5 4 3 2 1 CPU DC/DC Spears Intel UMA Block Diagram 2007/08/29 ISL6262A INPUTS Project code : 91.4W001.001 PCB P/N : 07211 Revision : -1 Intel CPU D Merom 4M FSB:667MHz/800MHz CLK GEN ICS9LPRS365 4 CRT INPUTS 17 1D05V_S0 1D8V_S3 LVDS LCD 18 SYSTEM DC/DC DDR I/F

6A18

Abstract: b055 BCD DIVISION USING MPASM C047 Embedded Control Handbook volume ii E02d 6A19 MAP 9004 6A-19 AN544
Contextual Info: AN544 Math Utility Routines Author: As more routines are available, they will be added to the library. The latest routines may be obtained either through Microchip's bulletin board or by contacting your nearest Microchip sales office for a copy on a MS-DOS floppy.

sharp 1a01

Abstract: PN 0506 b4 TL 1838 1a01 sharp 0619al 0421h DIN43 670 1A01 1A02 595 BC 0712 ACC MICRO 2089
Contextual Info: SM5K5 4-bit Single Chip Microcomputer Application Note Remote Control Receiver INTRODUCTION FEATURES The aim of the project is to generate a receiver controller to receive the signal of the format issued by the home-appliances association in Japan through the single chip computer SM5K5 made by SHARP.

b055

Abstract: C047 1C18 BCD DIVISION USING MPASM 2F27 AN544 PIC17C42 C08F E311 0029 6A19
Contextual Info: AN544 Math Utility Routines Author: As more routines are available, they will be added to the library. The latest routines may be obtained either through Microchip's bulletin board or by contacting your nearest Microchip sales office for a copy on a MS-DOS floppy.

hp laptop inverter board schematic

Abstract: hp laptop battery pinout hp laptop battery pack pinout xc5000 digital tv schematic diagram schematic diagram of laptop inverter RTL 2832 tektronix tek 455 osc. manual 4100 MFP xc95144pq160 venus 634
Contextual Info: Development System Reference Guide Introduction Design Flow PARTGEN NGDBuild The User Constraints UCF File Using Timing Constraints The Logical Design Rule Check MAP—The Technology Mapper LCA2NCD The Physical Constraints (PCF) File DRC—Physical Design Rule

1A98

Abstract: GEN10 0a4b 1.8V 0.33F S19202CBI30 NDQ 434
Contextual Info: S19202CBI30 GANGES Product Specification Revision 3.1 January 16, 2002 AMCC Dear customer, Thank you for choosing an AMCC device. We appreciate your confidence in our products. To ensure your complete satisfaction with our products and technologies, we have prepared this

neptune make M9 power analyzer USER MANUAL

Abstract: neptune make M8 power analyzer USER MANUAL SRF 504 112dl hpn 986 007 S30VQ100 srf 4100 3 bit alu using verilog hdl code motorola shm 825 CTL 1616
Contextual Info: Development System Reference Guide Introduction Design Flow PARTGEN NGDBuild User Constraints UCF File Using Timing Constraints Logical Design Rule Check MAP—The Technology Mapper LCA2NCD Physical Constraints (PCF) File DRC—Physical Design Rule Check