16WORDS Search Results

42-PIN

Abstract: 44-PIN 48-PIN DIP42-P-600-2 MSM531652F
Contextual Info: O K I Semiconductor MSM531652F_ 1,048,576-Words x 16-bit or 2,097,152-Bytes x 8-bit MaskROM 16Words x 16-Bit or 32Bytes x 8-Bit/Page Mode MASKROM • DESCRIPTION The OKI M SM531652F is a 1,048,576-words x 16-bit or 2,097,152-bytes x 8-bit CMOS Mask ROM with an asynchronous page read mode. Each page is organized 16 words x 16bit or 32bytes x 8-bit. It operates on a single 5.0V power supply and is TTL compatible. The

MSM531652F

Abstract: 42-PIN 44-PIN 48-PIN DIP42-P-600-2
Contextual Info: Semiconductor MSM531652F 1,048,576-Words x 16-bit or 2,097,152-Bytes x 8-bit MaskROM 16Words x 16-Bit or 32Bytes x 8-Bit/Page Mode MASKROM DESCRIPTION The OKI MSM531652F is a 1,048,576-words x 16-bit or 2,097,152-bytes x 8-bit CMOS Mask ROM with an asynchronous page read mode. Each page is organized 16 words x 16bit or 32bytes x 8-bit. It operates on a single 5.0V power supply and is TTL compatible. The

te0509

Abstract: 7253X
Contextual Info: 7A ug us t, 20 05 09 :4 7: 19 PM PM7389 FREEDM 84A1024 Data Sheet Released ed ne sd ay ,1 FREEDM -84A1024 DATA SHEET Released Issue 4: March 2003 Do wn lo ad ed by Co nt e nt Te a m of Pa rtm in er In co n W Frame Engine and Datalink Manager 84A1024 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

HYE18P16161AC

Contextual Info: Data Sheet, V2.2, July 2004 HYE18P16161AC-70/L70 HYE18P16161AC-85/L85 16M Asynchronous/Page CellularRAM CellularRAM Memory Products N e v e r s t o p t h i n k i n g . Edition 2004-7-12 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 München, Germany

EZR0

Abstract: SRAM SAMSUNG
Contextual Info: FREEDM -336A1024 PRELIMINARY DATA SHEET ISSUE 9 FRAME ENGINE AND DATA LINK MANAGER 336A1024 19 Ju ly, 20 02 11 :26 :56 AM PMC-1991476 ies Inc on Fr ida y, FREEDM™-336A1024 DATA SHEET PROPRIETARY AND CONFIDENTIAL PRELIMINARY ISSUE 9: MAY, 2002 Do wn loa

implementation of 16-tap fir filter using fpga

Abstract: FIR FILTER implementation xilinx circuit diagram of half adder XC4003PC84 XC4000 FIR Filter LUT control device fir compiler xilinx fir filter applications FIR FILTER xilinx
Contextual Info: 16-Tap, 8-Bit FIR Filter Applications Guide November 21, 1994 Application Note BY GREG GOSLIN & BRUCE NEWGARD Summary This application note describes the functionality and integration of a 16-Tap, 8-Bit Finite Impulse Response FIR filter macro with predefined coefficients (e.g. low pass) and a sample rate of 5.44 mega-samples per second or 784

EC 9410 -F

Abstract: ec 9410- f EC 9410 -1
Contextual Info: 9410 r REGISTER STACK» 1 6 x 4 RAM WITH 3-STATE OUTPUT REGISTER „P FAIRCHILD TTL MACROLOGIC „ f! ' A c : r u tr D ESCR IPTIO N - The 9410 is a register oriented high speed 6 4 -b it Read/W rite M em ory organized as 16-words by 4-bits. A n edge triggered 4 -b it o u tp u t register allows new inpu t

samsung electronics ba41

Abstract: BA175
Contextual Info: Preliminary FLASH MEMORY K8C56 57 15ET(B)M 256Mb M-die MLC NOR Specification INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

BA379

Abstract: BA377 BA339 BA438 BA429 BA416 ba-302 BA512 BA308 ba324
Contextual Info: K8A5615ET B A NOR FLASH MEMORY Document Title 256M Bit (16M x16) Synchronous Burst , Multi Bank NOR Flash Memory Revision History Revision No. History Draft Date Remark 0.0 Advanced March 15, 2004 Advance 0.1 Revision - Change the speed code 7B : 90ns @54MHz -> 7B : 88.5ns @54MHz

54F10

Abstract: 74F10 E28A
Contextual Info: April 1989 9403A First-In First-Out FIFO Buffer Memory General Description Features The 9403A is an expandable fa ll-through type high-speed First-In First-O ut (FIFO) B utter M em ory optim ized fo r high­ speed disk or tape co ntrollers and com m unication buffer

9403A-C

Contextual Info: April 1989 Semiconductor & 9403A First-In First-Out FIFO Buffer Memory General Description Features The 9403A is an expandable fall-through type high-speed First-In First-Out (FIFO) Buffer Memory optimized for high­ speed disk or tape controllers and communication buffer

IRF 950

Abstract: 74F403A 74F403ASPC N24C
Contextual Info: Revised May 1999 74F403A First-In First-Out FIFO Buffer Memory General Description Features The 74F403A is an expandable fall-through type highspeed First-In First-Out (FIFO) Buffer Memory optimized for high-speed disk or tape controllers and communication

N74S89N

Abstract: N74LS89F N74LS89N N74S89F S54LS89F S54S89F
Contextual Info: 54S/74S89 54LS/74LS89 Preliminary LOGIC SYMBOL data FEATURES DESCRIPTION T h e ''S S }" is a 6 4 -B it h ig h -s p e e d R e a d / W r it e R a n d o m A c c e s s M e m o r y fo r u s e a s a “s c r a t c h p a d 1’ m e m ory with n o n -d e stru c tiv e

06SEC

Abstract: BA213 16N10 BA167 BA184 15ET BA244 BA242 K8F5615ETM samsung nor flash
Contextual Info: K8F56 57 15ET(B)M NOR FLASH MEMORY 256Mb M-die MLC NOR Specification INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,

k 1358

Abstract: 56FBGA
Contextual Info: 32 Mbit Burst Mode Concurrent SuperFlash ComboMemory SST34WA32A3 / SST34WA32A4 / SST34WA3283 / SST34WA3284 Advance Information FEATURES: • Flash Organization: – 2M x 16 • PSRAM Organization: – 8 Mbit: 512k X 16 – 16 Mbit: 1M x 16 • Single Voltage Read and Write Operations

W29GL064C

Contextual Info: W29GL064C 64M-BIT 3.0-VOLT PARALLEL FLASH MEMORY WITH PAGE MODE Publication Release Date: October 18, 2011 Preliminary - Revision E BLANK W29GL064C Table of Contents 1 2 3 4 5 6 7 GENERAL DESCRIPTION . 1

Contextual Info: Data Sheet, V2.3, April 2005 HYE18P32160AF-15 32M Synchronous Burst CellularRAM CellularRAM Memory Products N e v e r s t o p t h i n k i n g . Data Sheet, V2.3, April 2005 HYE18P32160AF-15 32M Synchronous Burst CellularRAM CellularRAM Memory Products N e v e r

MSM531655E

Abstract: TSOP 66 Package TSOP70-P-400
Contextual Info: Semiconductor MSM531655E 524,288-Double Words x 32-bit or 1,048,576-Words x 16-bit MaskROM 8Double Word x 32-Bit or 16Word x 16-Bit/Page Mode MASKROM DESCRIPTION The OKI MSM531655E is a 524,288-double words x 32-bit or 1,048,576-words x 16-bit CMOS Mask ROM with an asynchronous page read mode. Each page is organized 8 double

74F403A

Abstract: 74F403ASPC MS-001 N24C
Contextual Info: Revised October 2000 74F403A First-In First-Out FIFO Buffer Memory General Description Features The 74F403A is an expandable fall-through type highspeed First-In First-Out (FIFO) Buffer Memory optimized for high-speed disk or tape controllers and communication

Contextual Info: HYE18P16161AC-70/85 Graphics & Specialty Memories 16M Async/Page CellularRAM Version 1.8 06.2003 HYE18P16161AC-70/85 16M Async/Page CellularRAM Revision History – V1.31, 11/00 Fully synchronous bus interface with multiplexed address and data, asyncronous write, 1.8V

PF38F4060

Abstract: PF38F4060M SCSP M18 PF38F4050 PF38F4060M0y 3076* intel 3098* intel tba 790
Contextual Info: Intel StrataFlash Cellular Memory M18 SCSP 2048-Mbit M18 Family with Synchronous PSRAM Datasheet Product Features „ „ „ „ „ Device Architecture — Flash Die Density: 256, 512 Mbit, or 1 Gbit — PSRAM Die Density: 64 or 128 Mbit — x16 Non-Mux or AD-Mux I/O Interface

delta dps 298 cp

Abstract: delta dps 298 cp-1 IRF 8030 irf 4710 bbc 598 479 DIODE F4049 sn 94042 Switching power supplies Delta electronics dps MR 4710 ci 4047B
Contextual Info: FAIRCHILD BIPOLAR M IC R O P R O C E S S O R □ATABOOK MACROLOGIC BIPOLAR MICROPROCESSOR OATABOOK FAIRCHILD 4 6 4 Ellis S tre e t, M o u n ta in V ie w , C alifo rn ia 9 4 0 4 2 c 1976 F a i r c h il d C a m e r a a n d In s t r u m e n t C o r p o r a t i o n / 4 6 4 E llis S t r e e t , M o u n t a i n V i e w , C a li f o r n ia 9 4 0 4 2 / 4 1 5 9 6 2 - 5 0 1 1 / T W X

fairchild 9410

Abstract: 18-PIN 9410 ScansUX1004
Contextual Info: 9410 REGISTER S T A C K - 1 6 x 4 RAM WITH 3-STATE OUTPUT REGISTER FAIRCHILD TTL MACROLOGIC DESCRIPTION - The 9410 is a register oriented high speed 64-bit Read/Write Memory organized as 16-words by 4-bits. An edge-triggered 4-bit output register allows new input

156 relay

Abstract: relay 156 PM7389
Contextual Info: Oc to be r, 20 03 02 :3 7: 35 AM PM7389 FREEDM 84A1024 Data Sheet Released Tu es da y, 14 FREEDM -84A1024 DATA SHEET Released Issue 4: March 2003 lo ad ed by Am r Ma ns ou ro fS ilic on Ex pe rt Te cn ol og yI nc on Frame Engine and Datalink Manager 84A1024