159B Search Results

HRW36

Abstract: Silicon Schottky Barrier Diode Hitachi DSA00125
Contextual Info: ADE-208-159B Z HRW36 Silicon Schottky Barrier Diode for High Frequency Rectifying Rev. 2 Nov. 1994 Features Pin Arrangement • Low forward voltage drop. (VF =0.80V max) • High reverse voltage. (VR =90V max) 1 2 3 Ordering Information Type No. Laser Mark

SLP-271D

Abstract: SLP171D SLP-471D SLP-274B SLP978C
Contextual Info: ;SANYO SEMICONDUCTOR CORP >E I 7997076 SANYO SEMICONDUCTOR CORP LED O e « « Type No. - m % « SLP-159B SLP-259B SLP-459B SLP-171D SLP-271D SLP-471D SLP-173B-01 SLP-273B-01 SLP-473B01 SLP-174B SLP-274B SLP-474B SLP-175B SLP-275B SLP-475B SLP-178C SLP-278C

HRW36

Abstract: Hitachi DSA001653 lot code
Contextual Info: HRW36 Silicon Schottky Barrier Diode for High Frequency Rectifying ADE-208-159B Z Rev. 2 Nov. 1994 Features • Low forward voltage drop. (VF = 0.80V max) • High reverse voltage. (VR = 90V max) Ordering Information Type No. Laser Mark Package Code HRW36

Contextual Info: ADE-208-159B Z HRW36 Silicon Schottky Barrier Diode for High Frequency Rectifying HITACHI Features Rev. 2 Nov. 1994 Pin Arrangement • Low forward voltage drop. (VF =0.80V max) • High reverse voltage. (VR=90V max) Ì 1 2 3 Ordering Information Type No.

32176 Group PWM CODE

Contextual Info: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid

Contextual Info: WEDPY256K72V-XBX 256Kx72 Synchronous Pipeline SRAM FEATURES DESCRIPTION  Fast clock speed: 100, 133, 150, 166 and 200* MHz The WEDPY256K72V-XBX employs high-speed, low-power CMOS designs that are fabricated using an advanced CMOS process. The 16Mb Synchronous SRAMs integrate two 256K x 36 SRAMs

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Contextual Info: WEDPY256K72V-XBX 256Kx72 Synchronous Pipeline SRAM Preliminary* FEATURES DESCRIPTION n Fast clock speed: 100, 133, 150, 166 and 200* MHz The WEDPY256K72V-XBX employs high-speed, low-power CMOS designs that are fabricated using an advanced CMOS process. The 16Mb Synchronous SRAMs integrate

Contextual Info: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid

ISL9504

Abstract: b6886 PP3V42G3H NVIDIA G84m ISL9504BCRZ C8050 12v p66 apple k50 apple M75 MLB 820-2101 PP3V42
Contextual Info: 8 6 7 2 3 4 5 CK APPD OROYA 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. 1 REV ZONE ECN ENG APPD DESCRIPTION OF CHANGE DATE ? ? ? ? DATE ? 03/20/2007 - DVT

PP3V42G3H

Abstract: temperature controller CHB 402 manual I251 diode c3909 ar9350 PP3V42 R859 p66 apple temperature controller CHB 402 U6700
Contextual Info: 8 6 7 REV .csa Page TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM

ar9350

Abstract: Apple 820-1881 p51 apple diode sot 143 s5 C7555 PP3V42G3H 101B SOT23-6 ah530 R7549 MLB-EVT
Contextual Info: 8 6 7 2 3 4 5 1 CK APPD 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. REV SCHEM,MLB,M1 ZONE ECN ENG APPD DESCRIPTION OF CHANGE DATE D DATE 428208PRODUCTION RELEASED 03/04/06

SS 1603

Abstract: FU-68SDF-V802M103B FU-68SDF-V802M104B FU-68SDF-V802M105B FU-68SDF-V802M106B FU-68SDF-V802M139B FU-68SDF-V802M140B FU-68SDF-V802M141B FU-68SDF-V802M142B FU-68SDF-V802M175B
Contextual Info: TENTATIVE MITSUBISHI OPTICAL DEVICES FU-68SDF-V802MxxxB 1.58 (L-Band) DFB-LD MODULE WITH SINGLEMODE FIBER PIGTAIL (WAVELENGTH SELECTED, BIAS CIRCUIT INTEGRATED, DIGITAL APPLICATION) DESCRIPTION M odule type FU-68SDF-V802M xxB is a 1.5£|a,m (L-Band) DFB-LD module with single-m ode optical

recloser

Abstract: sgm switch power cable fault locator decay method lon gateway LA 4303
Contextual Info: 3URWHFW,7 /LQH GLVWDQFH SURWHFWLRQ WHUPLQDO 5 /   1MRK 506 159-BEN Page 1 Revision: A Issued: October 2003 Data subject to change without notice HDWXUHV • Open terminal with extensive configuration possibilities and expandable hardware design to meet specific user requirements

Contextual Info: WEDPY256K72V-XBX 256Kx72 Synchronous Pipeline SRAM FEATURES DESCRIPTION  Fast clock speed: 100, 133, 150, 166 and 200* MHz The WEDPY256K72V-XBX employs high-speed, low-power CMOS designs that are fabricated using an advanced CMOS process. The 16Mb Synchronous SRAMs integrate two 256K x 36 SRAMs

2C66

Abstract: ML marking t41l 1c51 MAXIM COUNTRY OF ORIGIN 3F61 19L4W 0532G
Contextual Info: MIL+-195CU/139B ● SUPE3SED1NG KH,-3-195C@39A 31 M1LIT4RI W% TRAJISISMR, TYPE This the tnr, Ar!Jv. 1. SCOPE 1.1 w. trar,ai. for me 1.3 Absoluta-mximm 1.4 Prim.n for .,. W the Nwv. in chaPPer PNP, SILICON JAN-2N1119 k.=” . mmr.awd k and 1s mda- the and

73e42

Contextual Info: 111111111111111111 123245677348459ABCCC4 DEF47741E413249EF4A7374 1 1 1 1 1 1 1 9218544851891 9218651 114B1!"7785A#796$1 %AA8A1D3&'1B3 31!#7A$1 C581 4#1#51#7B51!3&B4$1 1A7"8#51*1#5B58#851A9B564#51

phototransistor OCP71

Abstract: OCP71 GTE175M GD150M gsa10 dekatron GC10D ScansU9X23 DIGITRON GR10A
Contextual Info: 141 C IR C U IT S Dekatron Circuits The recommended Dekatron drive and coupling circuits are given in the following pages together with a number of suitable pulse shaping circuits. Although in the majority of cases the Dekatron counter symbol has been used, the drive circuits are equally applic­

dma controller chip

Contextual Info: in tj, 82374EB EISA SYSTEM COMPONENT ESC • Integrates EISA Compatible Bus Controller — Translates Cycles between EISA and ISA Bus — Supports EISA Burst and Standard Cycles — Supports ISA No Wait State Cycles — Supports Byte Assembly/ Disassembly for 8-, 16- and 32-Bit

k3155

Abstract: MCR68-3 DT28
Contextual Info: M13X Device DS3/DS1 MUX/DEMUX, Enhanced Features TXC-03305 FEATURES DESCRIPTION • The The M13X M13X CMOS CMOS VLSI VLSI device device provides provides the the functions functions needed needed to to multiplex multiplex and and demultiplex demultiplex 28

T 1S98

Abstract: 38510/159 FCT ckt HPF 505 1N3064
Contextual Info: MIL-M-38510/1593 1QUÀLÏrICATI ON 21 JULY 1986 I REQUIREMENTS I REMOVED SUPERSEDING MIL-M-38510/159A 11 June 1984 MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, TTL, SHIFT REGISTERS, MONOLITHIC SILICON 1NACIIVli FOR HEWDLSISH AFTER' BATE dF THIS REvtSl6N.~|

LFSR COUNTER

Abstract: 1969 fairchild X5801 XC3000 XC4000 XC4000E XC4010E 145146 74 XOR GATE math polynomials
Contextual Info: Efficient Shift Registers, LFSR Counters, and Long PseudoRandom Sequence Generators  August 1995 Application Note By PETER ALFKE Summary Shift registers longer than eight bits can be implemented most efficiently in XC4000E RAM. Using Linear Feedback Shift-Register LFSR counters to address the RAM makes the design even simpler. This application note describes

dq35j

Abstract: CS11 CS21 CS22 WEDPY256K72V-XBX
Contextual Info: White Electronic Designs WEDPY256K72V-XBX 256Kx72 Synchronous Pipeline SRAM DESCRIPTION FEATURES The WEDPY256K72V-XBX employs high-speed, lowpower CMOS designs that are fabricated using an advanced CMOS process. The 16Mb Synchronous SRAMs integrate two 256K x 36 SRAMs into a single

contactless

Abstract: ST92163MCU 159b ST16-19RFRDCS910 ST92163
Contextual Info: ST16-19RFRDCS910 CONTACTLESS READER CHIP SET With ST92163MCU DATA BRIEFING FUNCTION: ANALOG FRONT END FOR CONTACTLESS SMARTCARD READER • GENERAL DESCRIPTION – This is an analog front end dedicated to contactless Smartcards reader chip set. – This interface complies with ISO 14443-2 Type