1544KBPS Search Results

cd 4553

Abstract: ic cd 4553 cmos 4553 ATM machine working circuit diagram GPON block diagram ic 4553 master 5087 mii to hdlc DS34S101 DS34S102
Contextual Info: ABRIDGED DATA SHEET Rev: 101708 DS34S101, DS34S102, DS34S104, DS34S108 Single/Dual/Quad/Octal TDM-over-Packet Chip General Description These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial

Nx62

Abstract: DS3100 DS3104GN DS3104-SE GR-1244-CORE GR-253-CORE GR-499-CORE
Contextual Info: Rev: 072407 DS3104-SE Line Card Timing IC with Synchronous Ethernet Support General Description The DS3104-SE is a low-cost, feature-rich timing IC for line cards with synchronous Gigabit Ethernet GbE , 10-Gigabit Ethernet (10GbE), and Fast Ethernet ports.

DS3100

Abstract: DS3105 DS3105LN GR-1244-CORE GR-253-CORE LQFP64 MCR10 ACS8525 MCR10 ROHS D1801
Contextual Info: Preliminary. Subject to Change Without Notice. PRELIMINARY DATASHEET DS3105 Line Card Timing IC www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS3105 is a low-cost, feature-rich timing IC for telecom line cards. Typically the device accepts two reference clocks from dual redundant system timing

Contextual Info: PRODUCT BRIEF DS3177 DS3/E3 Single-Chip Transceiver FEATURES GENERAL DESCRIPTION The DS3177 combines a DS3/E3 framer and an LIU single-chip transceiver to interface to a DS3/E3 physical copper line. • •  APPLICATIONS  Routers and Switches Multiservice Access

IC 7106

Abstract: IC1 723 N13T1 I431 telcordia
Contextual Info: DEMO KIT AVAILABLE DS3100 Stratum 3/3E Timing Card IC www.maxim-ic.com GENERAL DESCRIPTION FEATURES When paired with an external TCXO or OCXO, the DS3100 is a complete central timing and synchronization solution for SONET/SDH network elements. With two multiprotocol BITS/SSU receivers

nx10 alarm system

Abstract: nx10 alarm
Contextual Info: Preliminary. Subject to Change Without Notice. PRELIMINARY DATASHEET DS3102 Stratum 3 Timing Card IC with Synchronous Ethernet Support www.maxim-ic.com GENERAL DESCRIPTION FEATURES When paired with an external TCXO or OCXO, the DS3102 is a highly integrated central timing and

Ic 7423

Contextual Info: DEMO KIT AVAILABLE DS3101 Stratum 3/3E Timing Card IC www.maxim-ic.com FEATURES GENERAL DESCRIPTION When paired with an external TCXO or OCXO, the DS3101 is a highly integrated central timing and synchronization solution for SONET/SDH network elements. With 14 input clocks, the device directly

TXN612

Abstract: MT 8222 t1e8 AMI 8531
Contextual Info: + DS32506/DS32508/DS32512 6-/8-/12-Port DS3/E3/STS-1 LIU www.maxim-ic.com FEATURES GENERAL DESCRIPTION Pin-Compatible Family of Products Each Port Independently Configurable Receive Clock and Data Recovery for Up to 457 meters 1500 feet of 75Ω Coaxial Cable

IC 7106

Contextual Info: DS3100 Stratum 3/3E Timing Card IC www.maxim-ic.com GENERAL DESCRIPTION FEATURES When paired with an external TCXO or OCXO, the DS3100 is a complete central timing and synchronization solution for SONET/SDH network elements. With two multiprotocol BITS/SSU receivers

Contextual Info: 19-4750; Rev 1; 7/11 DS34S132 32-Port TDM-over-Packet IC General Description The IETF PWE3 SAToP/CESoPSN/HDLC-compliant DS34S132 provides the interworking functions that are required for translating TDM data streams into and out of TDM-over-Packet TDMoP data streams

ic cd 4553

Abstract: cd 4553 Y1453 cts ocxo 10MHz TEBGA-484 RFC-5087 DS34S101 ic 4553 DS34S104GN DS34S108GN
Contextual Info: ABRIDGED DATA SHEET Rev: 032609 DS34S101, DS34S102, DS34S104, DS34S108 Single/Dual/Quad/Octal TDM-over-Packet Chip General Description These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial

ACS8520

Abstract: ACS8530 DS3100 DS3101 DS3101GN GR-1244 GR-253 ocxo 25MHz GR378
Contextual Info: DS3101 Stratum 3/3E Timing Card IC www.maxim-ic.com FEATURES GENERAL DESCRIPTION When paired with an external TCXO or OCXO, the DS3101 is a highly integrated central timing and synchronization solution for SONET/SDH network elements. With 14 input clocks, the device directly

LC1 D12 wiring diagram

Abstract: DS3151 DS3151N DS3152 DS3152N DS3153 DS3153N DS3154 DS3154N
Contextual Info: DEMO KIT AVAILABLE DS3151/DS3152/DS3153/DS3154 Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS3151 single , DS3152 (dual), DS3153 (triple), and DS3154 (quad) line interface units (LIUs) perform the functions necessary for interfacing at the

Contextual Info: Rev: 032609 DS34S101, DS34S102, DS34S104, DS34S108 Single/Dual/Quad/Octal TDM-over-Packet Chip General Description These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial

RELAY RZ2 h12

Abstract: RELAY RZ2 G12 transistor k72 t8 transistor bipolar k72 65 k82 TZ62 rz24 relay K117 datasheet rz2 d12 relay k6f y2
Contextual Info: DS3161/DS3162/DS3163/DS3164 Single/Dual/Triple/Quad ATM/Packet PHYs for DS3/E3/STS-1 www.maxim-ic.com FUNCTIONAL DIAGRAM GENERAL DESCRIPTION DS3/E3 LINE INTERFACE APPLICATIONS Access Concentrators SONET/SDH ADM SONET/SDH Muxes PBXs Digital Cross Connect Test Equipment

LC1 D12 wiring diagram

Abstract: DS3152-2 SMD 5 PIN CODE G7 DS3151 DS3151N DS3152 DS3152N DS3153 DS3153N DS3154
Contextual Info: DEMO KIT AVAILABLE DS3151/DS3152/DS3153/DS3154 Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS3151 single , DS3152 (dual), DS3153 (triple), and DS3154 (quad) line interface units (LIUs) perform the functions necessary for interfacing at the

m68302

Abstract: 27859
Contextual Info: Intel IXF3204 Quad T1/E1/J1 Framer with Intel® On-Chip PRM Datasheet Product Features • ■ ■ ■ ■ ■ ■ ■ ■ Quad T1/E1/J1 Framer Software selectable and fully independent T1/E1/J1 operation Support for T1/E1/J1 standards: — T1: T1-SF, T1-ESF, Lucent* SLC®96

tms 1951 nl

Abstract: alcatel 1511 max sf12 "pin compatible"
Contextual Info: Intel IXF3208 Octal T1/E1/J1 Framer with Intel® On-Chip PRM Datasheet Product Features • ■ ■ ■ ■ ■ ■ ■ ■ Octal T1/E1/J1 Framer Software selectable and fully independent T1/E1/J1 operation Support for T1/E1/J1 standards: — T1: T1-SF, T1-ESF, Lucent* SLC®96

LC1 D12 wiring diagram

Abstract: ASSIGNMENT-52 DS3151 DS3151N DS3152 DS3152N DS3153 DS3153N DS3154 DS3154N
Contextual Info: DEMO KIT AVAILABLE DS3151/DS3152/DS3153/DS3154 Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS3151 single , DS3152 (dual), DS3153 (triple), and DS3154 (quad) line interface units (LIUs) perform the functions necessary for interfacing at the

SMD K2F

Abstract: step down transformer 230 v to 15 v DS3171N BSP19 k117 GR msap smd diode K2F transistor k117 DS3171 DS3172
Contextual Info: DS3171/DS3172/DS3173/DS3174 Single/Dual/Triple/Quad DS3/E3 Single-Chip Transceivers www.maxim-ic.com GENERAL DESCRIPTION FUNCTIONAL DIAGRAM The DS3171, DS3172, DS3173, and DS3174 DS317x combine a DS3/E3 framer(s) and LIU(s) to interface to as many as four DS3/E3 physical copper

IXF3208

Contextual Info: Cortina Systems IXF3208 Octal T1/E1/ J1 Framer Datasheet Product Features „ „ „ Octal T1/E1/J1 Framer Software selectable and fully independent T1/E1/J1 operation Support for T1/E1/J1 standards: „ — BERT generators and analyzers for extensive on-chip error testing

nx62

Contextual Info: Rev: 070507 DS3104-SE Line Card Timing IC with Synchronous Ethernet Support General Description The DS3104-SE is a low-cost, feature-rich timing IC for line cards with synchronous Gigabit Ethernet GbE , 10-Gigabit Ethernet (10GbE), and Fast Ethernet ports.

Contextual Info: DS3251/DS3252/DS3253/DS3254 Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs www.maxim-ic.com GENERAL DESCRIPTION FEATURES The DS3251 single , DS3252 (dual), DS3253 (triple), and DS3254 (quad) line interface units (LIUs) perform the functions necessary for interfacing at the

T-14041

Abstract: HDB3 schematic
Contextual Info: DEMO KIT AVAILABLE DS3150 3.3V, DS3/E3/STS-1 Line Interface Unit www.maxim-ic.com FEATURES GENERAL DESCRIPTION § The DS3150 performs all the functions necessary for interfacing at the physical layer to DS3, E3, and STS-1 lines. The receiver performs clock and data