14X22 Search Results

Contextual Info: Closing cap - SEALING PLUG 14X22 RD - 1400270 Please be informed that the data shown in this PDF Document is generated from our Online Catalog. Please find the complete data in the user's documentation. Our General Terms of Use for Downloads are valid

153BGA

Contextual Info: 128K x 72 SSRAM Multi-Chip Package WEDPY128K72V-XBX Optimum Density and Performance in one Package WEDPY128K72V-XBX* • Designed as L2 Cache for the PowerPC 750 see page 2 for typical application block diagram • PACKAGE: 14x22mm, 153 Plastic Ball Grid Array (PBGA), 308mm2

TDK H5C2 material

Abstract: T22 ferrite TDK H5C2 TDK H5C2 CORE MATERIAL T20X10X12 T60X 752102 ferrite core tdk h5c2
Contextual Info: TDK Ferrite Cores TOROIDAL CORES o RorC * Parameters Dimensions in ¡ es Type A B C Ci mm ' Ae (mm2) T9 .5 2x 3 . 1 8x 4.75 9.52 ±0.4 .3751.016 4.75 + 0.3 .1871.012 3.1810.25 .1251.010 2.84 7.29 T1 2. 7x 4 . 7 7x 7.14 12.7±0.4 .5001.016 7.1410.3 .2811.012

IS61LPS102418A

Abstract: IS61LPS25672A IS61LPS51236A IS61VPS102418A IS61VPS25672A IS61VPS51236A IS61LPS51236A-200TQLI 1024Kx18
Contextual Info: IS61VPS25672A IS61LPS25672A IS61VPS51236A IS61LPS51236A IS61VPS102418A IS61LPS102418A ISSI 256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write

IS61LPD51218A

Abstract: IS61LPD25636A IS61VPD25636A IS61VPD51218A
Contextual Info: ISSI IS61VPD25636A IS61LPD25636A IS61VPD51218A IS61LPD51218A 256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and

IS61LPS25632A

Abstract: IS61LPS25636A IS61LPS51218A IS61VPS25636A IS61VPS51218A
Contextual Info: IS61LPS51218A, IS61LPS25636A, IS61LPS25632A, IS64LPS25636A, IS61VPS51218A, IS61VPS25636A 256K x 36, 256K x 32, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, Single CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write

IS64LF12832A-7

Abstract: is64lf12832a LF12836A E0108 IS61LF12836A-6.5B3
Contextual Info: IS61 64 LF12832A IS64VF12832A IS61(64)LF12836A IS61(64)VF12836A IS61(64)LF25618A IS61(64)VF25618A 128K x 32, 128K x 36, 256K x 18 4 Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write

Contextual Info: IS61LPS51218A, IS61LPS25636A, IS61LPS25632A, IS64LPS25636A, IS61VPS51218A, IS61VPS25636A 256K x 36, 256K x 32, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, Single CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write

IS61NLF204836B

Contextual Info: IS61NLF204836B/IS61NVF/NVVF204836B IS61NLF409618B/IS61NVF/NVVF409618B 2M x 36 and 4M x 18 72Mb, FLOW THROUGH 'NO WAIT' STATE BUS SRAM ADVANCED INFORMATION FEBRUARY 2013 FEATURES DESCRIPTION • 100 percent bus utilization The 72 Meg product family features high-speed, low-power

Contextual Info: 256K x 72 SSRAM Multi-Chip Package Optimum Density and Performance in One Package WEDPY256K72V-XBX* • Designed as L2 Cache for advanced processors see other side for typical application block diagram Performance Features AR Y Fast clock speeds: 200, 166, 150, 133 and 100MHz

Contextual Info: IS61LF25636A IS61LF51218A ISSI IS61VF25636A IS61VF51218A 256K x 36, 512K x 18 9 Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and

Contextual Info: IS61VPS25672A IS61LPS25672A IS61VPS51236A IS61LPS51236A IS61VPS102418A IS61LPS102418A ISSI 256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write

Contextual Info: ISSI IS61VF51236A IS61VF102418A IS61LF51236A IS61LF102418A 512K x 36, 1024K x 18 18M SYNCHRONOUS FLOW-THROUGH STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and

IS61LPD25636A-200TQLI

Abstract: IS61LPD51218A static SRAM single port IS61LPD25636A IS61VPD25636A IS61VPD51218A
Contextual Info: ISSI IS61VPD25636A IS61LPD25636A IS61VPD51218A IS61LPD51218A 256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and

Contextual Info: 128K x36/32 and 256K x18 4Mb, ECC, PIPELINE 'NO WAIT' STATE BUS SYNCHRONOUS SRAM JUNE 2012 FEATURES • 100 percent bus utilization • No wait cycles between Read and Write

Contextual Info: IS61 64 LPS102436B/IS61(64)VPS/VVPS102436B IS61(64)LPS204818B/IS61(64)VPS/VVPS204818B 1M x 36, 1M x 32, 2M x 18 36 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM ADVANCED INFORMATION FEBRUARY 2013 FEATURES DESCRIPTION •฀ Internal฀self-timed฀write฀cycle

Contextual Info: IS61 64 NLF102436B/IS61(64)NVF/NVVF102436B IS61(64)NLF204818B/IS61(64)NVF/NVVF204818B ADVANCED INFORMATION FEBRUARY 2013 1M x 36, 2M x 18 36Mb, FLOW THROUGH 'NO WAIT' STATE BUS SRAM FEATURES DESCRIPTION • 100 percent bus utilization The 72 Meg product family features high-speed, low-power

Contextual Info: IS61LPS51218A, IS61LPS25636A, IS61LPS25632A, IS64LPS25636A, IS61VPS51218A, IS61VPS25636A 256K x 36, 256K x 32, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM FEATURES •฀ Internal฀self-timed฀write฀cycle •฀ Individual฀Byte฀Write฀Control฀and฀Global฀Write

IS61LPS204818B

Abstract: IS61LPS2048
Contextual Info: IS61 64 LPS102436B/IS61(64)VPS/VVPS102436B IS61(64)LPS204818B/IS61(64)VPS/VVPS204818B 1M x 36, 1M x 32, 2M x 18 36 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM ADVANCED INFORMATION OCTOBER 2012 FEATURES DESCRIPTION • Internal self-timed write cycle

SKIIP 33 nec 125 t2

Abstract: skiip 613 gb 123 ct RBS 6302 ericsson SKIIP 513 gb 173 ct THERMISTOR ml TDK 150M pioneer PAL 010a Project Report of smoke alarm using IC 555 doc SKiip 83 EC 125 T1 ericsson RBS 6000 series INSTALLATION MANUAL Ericsson Installation guide for RBS 6302
Contextual Info: Discontinued and Superseded Stock Number History. This document contains Discontinued and Superseded Stock Number History. The information is listed in the following format: Stock Number: The original RS Stock Number of the item. Brief Description: The Invoice Description of the item.

21x21

Abstract: MM554 tray bga 45x45 bga X13769XJ2V0CD00 CPGA132 LA010 P14DH-100-300A2-1
Contextual Info: 検索ツール 1. ツールバーの アイコンをクリックしてください。 2. ［検索］のダイアログ・ボックスが表示されます。 3. 検索したいパッケージのNECコードを入力して， 検索 F をクリックしてください。

Contextual Info: 128K x36/32 and 256K x18 4Mb, ECC, SYNCHRONOUS FLOWTHROUGH SRAM JUNE 2012 PRELIMINARY INFORMATION DESCRIPTION FEATURES • Internal self-timed write cycle

BGA676

Abstract: BGA665 BGA-1156 156 QFN 12X12 LGA240 BGA-783 BGA441 BGA1024 BGA1521 7286X
Contextual Info: Ironwood Electronics Appendix A AP-A.1 APPENDIX A • BGA Chip Package Specification Tables . . . . . . . .page AP.2 thru AP.16 • LGA Chip Package Specification Table . . . . . . . . . . . . . . . . .page AP.17 • MLF Package Specification Table . . . . . . . . . . . . . . . . . . . . .page AP.18

84 pin PBGA

Abstract: IS64LF12836A-7
Contextual Info: IS61 64 LF12832A IS64VF12832A IS61(64)LF12836A IS61(64)VF12836A IS61(64)LF25618A IS61(64)VF25618A 128K x 32, 128K x 36, 256K x 18 4 Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM SEPTEBMER 2010 FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write