12XL6B Search Results

QL12x16B

Abstract: ic 236
Contextual Info: Q L12x16B WildCat 2000 Very-High-Speed 2K 6K Gate CMOS FPGA pASIC HIGHLIGHTS .6000 total available gates, 88 input pins Q Very High Speed - ViaLink metal-to-metal programmable-via anti-fuse technology, allows counter speeds over 150 MHz and logic cell delays of

Contextual Info: QLL8x12B and QLL12x16B CMOS FPGAs WildCaX Series Low Power 3.3 Volt Operation ADVANCE DATA 3.3 VOLT pASIC HIGHLIGHTS H B April 1994 High Speed pASIC FPGA Architecture - Enables very highperform ance operation at 3.3 Volts e.g. data path speed up to 80 M Hz

Contextual Info: QL12x16B W ildCat 2000 Very-High-Speed 2K 6K Gate CMOS FPGA pASIC HIGHLIGHTS Very High Speed - ViaLink metal-to-metal programmable-via anti-fuse technology, allows counter speeds over 150 MHz and logic cell delays of under 2 ns. B High Usable Density - A 12-by-16 array of 192 logic cells provides 6000

Contextual Info: QL16X24B W ild ca t 4000 Very-High-Speed 4K 12K Gate CMOS FPGA pASIC HIGHLIGHTS .4000 usable gates, 122 input pins Q Very High Speed - ViaLink metal-to-metal program m able-via antifuse technology, allows counter speeds over 150 MHz and logic cell delays of under 2 ns.

Contextual Info: QL12x16B WildCat 2000 Yery-High-Speed 2K 6K Gate CMOS FPGA Rev B pASIC HIGHLIGHTS .2000 usable gates, 88 I/O pins Very High Speed - ViaLink metal-to-metal programmable-via antifuse technology, allows counter speeds over 150 MHz and logic cell delays of under 2 ns.

Contextual Info: QL12X16B pASIC 1 Family Very-High-Speed CMOS FPGA Rev C pASIC HIGHLIGHTS . . . 2,000 usable ASIC gates, 88 I/O pins Very High Speed - ViaLink metal-to-metal program m able-via antifuse technology, allows counter speeds over 150 MHz and logic cell delays of under 2 ns.