128 LINE MUX Search Results

rg802

Abstract: DS2151Q DS2153 DS2153Q DS2153QN TS16 CRC9
Contextual Info: DS2153Q DS2153Q E1 Single–Chip Transceiver FEATURES PIN ASSIGNMENT • Complete E1 CEPT PCM–30/ISDN–PRI transceiver FUNCTIONAL BLOCKS LONG & SHORT HAUL LINE INTERFACE line interface for clock/data recovery and waveshaping • 32–bit or 128–bit jitter attenuator

DS2151Q

Abstract: DS2153 DS2153Q DS2153QN RG802 TS16
Contextual Info: DS2153Q DS2153Q E1 Single–Chip Transceiver FEATURES PIN ASSIGNMENT • Complete E1 CEPT PCM–30/ISDN–PRI transceiver FUNCTIONAL BLOCKS LONG & SHORT HAUL LINE INTERFACE line interface for clock/data recovery and waveshaping • 32–bit or 128–bit jitter attenuator

nokia 1200 circuit diagram

Abstract: d1276 d1275 D1878 equivalent nokia 1280 d1265 d1878 transistor d1276 TRANSISTOR D1879 D1278
Contextual Info: MXED301 128 Column by 80 Row OLED Advance Information Driver with Controller Subject To Change Without Notice FEATURES Standard Control and Data Interfaces • Parallel: 8-Bit Motorola 68xx or Intel 80xx • Serial: I2C, 3-Line, 3-Line and 4-Line SPI • 6.5MHz maximum data rate

TRANSISTOR D1879

Abstract: transistor d1878 d1878 nokia 1200 circuit diagram transistor d1276 circuit diagram of nokia 1209 D1878 equivalent d1276 D1275 D1878 data sheet
Contextual Info: MXED301 128 Column by 80 Row OLED Advance Information Driver with Controller Subject To Change Without Notice FEATURES Standard Control and Data Interfaces • Parallel: 8-Bit Motorola 68xx or Intel 80xx • Serial: I2C, 3-Line, 3-Line and 4-Line SPI • 6.5MHz maximum data rate

MTA02

Abstract: i860Xp MT 8222 Intel 82495 Cache Controller 3ce-14 LR1 D09 ahy 103 i860 64-Bit Microprocessor Performance Brief MCache Second Level Cache-Controller
Contextual Info: in t e ! 82495XP CACHE CONTROLLER/ 82490XP CACHE RAM Two-Way, Set Associative, Secondary Cache for i860 XP Microprocessor 50 MHz “No Glue” Interface with CPU Configurable — Cache Size 256 or 512 Kbytes — Line Width 32, 64 or 128 Bytes — Memory Bus Width 64 or 128 Bits

xxxjx

Contextual Info: in t e i 82495XP CACHE CONTROLLER/ 82490XP CACHE RAM Two-Way, Set Associative, Secondary Cache for i860 xp Microprocessor 50 MHz “No Glue” Interface with CPU Configurable — Cache Size 256 or 512 Kbytes — Line Width 32, 64 or 128 Bytes — Memory Bus Width 64 or 128 Bits

RG802

Contextual Info: DS2153Q E1 Single-Chip Transceiver www.maxim-ic.com PIN CONFIGURATION Complete E1 CEPT PCM-30/ISDN-PRI Transceiver Functionality On-Board Line Interface for Clock/Data Recovery and Waveshaping 32-Bit or 128-Bit Jitter Attenuator Generates Line Build-Outs for Both 120Ω

crc9

Abstract: 44-PIN DS2151Q DS2153Q DS2153QN TS16
Contextual Info: DS2153Q E1 Single-Chip Transceiver www.maxim-ic.com PIN CONFIGURATION Complete E1 CEPT PCM-30/ISDN-PRI Transceiver Functionality On-Board Line Interface for Clock/Data Recovery and Waveshaping 32-Bit or 128-Bit Jitter Attenuator Generates Line Build-Outs for Both 120Ω

SA81A

Contextual Info: DS2153Q E1 Single-Chip Transceiver www.maxim-ic.com PIN CONFIGURATION Complete E1 CEPT PCM-30/ISDN-PRI Transceiver Functionality On-Board Line Interface for Clock/Data Recovery and Waveshaping 32-Bit or 128-Bit Jitter Attenuator Generates Line Build-Outs for Both 120Ω

Contextual Info: DALLAS SEMICONDUCTOR DS2152 Enhanced T1 Single-Chip Transceiver PIN ASSIGNMENT FEATURES Complete DS1/ISDN-PRI transceiver functionality Line interface can handle both long and short haul trunks 32-bit or 128-bit crystal-less jitter attenuator Generates DSX-1 and CSU line build outs

tsm 1002

Abstract: RCC10
Contextual Info: DS2152 Enhanced T1 Single-Chip Transceiver www.dalsemi.com FEATURES PIN ASSIGNMENT 100 Complete DS1/ISDN-PRI transceiver functionality Line interface can handle both long and short haul trunks 32-bit or 128-bit crystal-less jitter attenuator Generates DSX-1 and CSU line build outs

6802 processor

Contextual Info: ISO-CMOS ST-BUS FAMILY MT8981D Digital Switch Features ISSUE8 March 1997 Ordering Information • Zarlink ST-BUS compatible • 4-line x 32-channel inputs • 4-line x 32-channel outputs • 128 ports non-blocking switch • Single power supply +5 V MT8981DE

MT8964

Abstract: MT8981D MT8981DE MT8981DP
Contextual Info: ISO-CMOS ST-BUS FAMILY MT8981D Digital Switch Features ISSUE8 March 1997 Ordering Information • Zarlink ST-BUS compatible • 4-line x 32-channel inputs • 4-line x 32-channel outputs • 128 ports non-blocking switch • Single power supply +5 V MT8981DE

6802 processor

Abstract: st 393 8-pin MT8964 MT8981D MT8981DE MT8981DP
Contextual Info: MT8981D ISO-CMOS ST-BUS FAMILY  Digital Switch Features ISSUE8 March 1997 Ordering Information • Mitel ST-BUS compatible • 4-line x 32-channel inputs • 4-line x 32-channel outputs • 128 ports non-blocking switch • Single power supply +5 V

MT8964

Abstract: MT8981D MT8981DE MT8981DP
Contextual Info: ISO-CMOS ST-BUS FAMILY MT8981D Digital Switch Features ISSUE8 March 1997 Ordering Information • Zarlink ST-BUS compatible • 4-line x 32-channel inputs • 4-line x 32-channel outputs • 128 ports non-blocking switch • Single power supply +5 V MT8981DE

MT8981D

Abstract: MT8981DE MT8981DP ST-BUS
Contextual Info: MT8981D ISO-CMOS ST-BUS FAMILY  Digital Switch Features ISSUE8 March 1997 Ordering Information • Mitel ST-BUS compatible • 4-line x 32-channel inputs • 4-line x 32-channel outputs • 128 ports non-blocking switch • Single power supply +5 V

DS2151

Abstract: DS2152 DS2152L DS2152LN DS2154 TC10 TC12 TR54016
Contextual Info: DS2152 DS2152 Enhanced T1 Single Chip Transceiver FEATURES • Complete DS1/ISDN–PRI transceiver functionality • Line interface can handle both long and short haul PIN ASSIGNMENT trunks • 32–bit or 128–bit crystal–less jitter attenuator • Generates DSX–1 and CSU line build outs

MEK6802D3

Contextual Info: ISO-CMOS ST-BUS FAMILY MT8981D Digital Switch Features ISSUE8 March 1997 Ordering Information • Zarlink ST-BUS compatible • 4-line x 32-channel inputs • 4-line x 32-channel outputs • 128 ports non-blocking switch • Single power supply +5 V MT8981DE

MT8964

Abstract: MT8981D MT8981DE MT8981DP
Contextual Info: ISO-CMOS ST-BUS FAMILY MT8981D Digital Switch Features ISSUE8 March 1997 Ordering Information • Zarlink ST-BUS compatible • 4-line x 32-channel inputs • 4-line x 32-channel outputs • 128 ports non-blocking switch • Single power supply +5 V MT8981DE

B23A

Abstract: ToPIC9
Contextual Info: DS2151Q T1 Single-Chip Transceiver www.maxim-ic.com PIN CONFIGURATION Complete DS1/ISDN-PRI Transceiver Functionality Line Interface Can Handle Both Long- and Short-Haul Trunks 32-Bit or 128-Bit Jitter Attenuator Generates DSX-1 and CSU Line Build-Outs Frames to D4, ESF, and SLC-96R Formats

MT8964

Abstract: MT8981D MT8981DC MT8981DE MT8981DP Mitel 8980
Contextual Info: ISO-CMOS ST-BUS FAMILY  MT8981D Digital Switch Features ISSUE 7 August 1996 Ordering Information • Mitel ST-BUS compatible • 4-line x 32-channel inputs • 4-line x 32-channel outputs • 128 ports non-blocking switch • Single power supply +5 V

TR62411

Abstract: 44-PIN DS2151Q DS2151QN DS2153Q
Contextual Info: DS2151Q T1 Single-Chip Transceiver www.maxim-ic.com PIN CONFIGURATION Complete DS1/ISDN-PRI Transceiver Functionality Line Interface Can Handle Both Long- and Short-Haul Trunks 32-Bit or 128-Bit Jitter Attenuator Generates DSX-1 and CSU Line Build-Outs Frames to D4, ESF, and SLC-96R Formats

MEK6802D3

Abstract: MT8964 MT8981D MT8981DC MT8981DE MT8981DL MT8981DP
Contextual Info: ISO-CMOS ST-BUS FAMILY  MT8981D Digital Switch Features ISSUE 6 May 1995 Ordering Information • Mitel ST-BUS compatible • 4-line x 32-channel inputs • 4-line x 32-channel outputs • 128 ports non-blocking switch • Single power supply +5 V

DS2151QB

Contextual Info: DS2151Q T1 Single-Chip Transceiver www.maxim-ic.com PIN CONFIGURATION Complete DS1/ISDN-PRI Transceiver Functionality Line Interface Can Handle Both Long- and Short-Haul Trunks 32-Bit or 128-Bit Jitter Attenuator Generates DSX-1 and CSU Line Build-Outs Frames to D4, ESF, and SLC-96R Formats