119L Search Results

119AC-470052N0

Abstract: Toko 10.7 mhz 119AC-470072N0 119AC-750112M0 119FC-560061N0 119FC-820051N0 119LC-470033N0 119AC-470033N0 119AC-470073N0 119AC-470084L0
Contextual Info: Sheet1 TYPE 7P High Frequency with Internal Capacitor TOKO Part Number 119AC-470033N0 119AC-470052N0 119AC-470072N0 119AC-470073N0 119AC-470084L0 119AC-470112N0 119AC-750111M0 119AC-750112M0 119FC-560061N0 119FC-820051N0 119LC-470033N0 119LC-470053N0 119LC-470073N0

Contextual Info: 128K X 36, 256K X 18, 3.3V SYNCHRONOUS SRAMS WITH 2.5V I/O OPTION, FLOW-THROUGH OUTPUTS, BURST COUNTER, SINGLE CYCLE DESELECT i :$*&&* 4« *»»« tK fc « * 'S * * * * ; 4ÎK «« ^ iL j; PRELIMINARY IDT71V2577 IDT71V2579 IDT71V3577 IDT71V3579 FE A TU R E S :

Contextual Info: 128K X 36, 256K X 18, 3.3V SYNCHRONOUS SRAMS WITH 2.5V I/O OPTION, PIPELINED OUTPUTS, BURST COUNTER, SINGLE CYCLE DESELECT D E S C R IP T IO N : FE A TU R E S : • 128K x 36,256K x 18 memory configurations • Supports high system speed: - PRELIMINARY IDT71V2576

Contextual Info: Æ SW ««K B » 128K X 36, 256K X 18, 3.3V SYNCHRONOUS SRAMS WITH 2.5V I/O OPTION, FLOW-THROUGH OUTPUTS, BURST COUNTER, SINGLE CYCLE DESELECT D E S C R IP T IO N : The IDT71Vx577/579 are high-speed SRAMs organized as 128K x 36/ 256K x 18. The IDT71Vx577/579 SRAMs contain write, data, address

Contextual Info: i 128K X 36, 256KX 18, 3.3V SYNCHRONOUS SRAMS WITH ZBT FEATURE, BURST COUNTER AND FLOW-THROUGH OUTPUTS :$*&&* 4« *»»« tK fc « * 'S * * * * ; 4ÎK«« '* * * « ^ iL j; PRELIMINARY IDT71 V2557,IDT71 V2559 IDT71V3557, IDT71V3559 FEATURES: The IDT71 Vx557/59 contain address, data-in and control signal regis­

GVT71256T18

Abstract: DQ974
Contextual Info: ADVANCE INFORMATION GALVANTECH, INC. SYNCHRONOUS CACHE TAG SRAM PIPELINED OUTPUT GVT71256T18 256K X 18 SYNCHRONOUS TAG SRAM 256K x 18 SRAM +3.3V SUPPLY WITH CLOCKED REGISTERED INPUTS FEATURES GENERAL DESCRIPTION • • • • • • The Galvantech Synchronous Burst SRAM family

71V2578

Contextual Info: 128K X 36, 256K X 18 3.3V Synchronous SRAMs 2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ IDT71V2576S IDT71V2578S IDT71V2576SA IDT71V2578SA Description 128K x 36, 256K x 18 memory configurations

CY7C1386C

Abstract: CY7C1387C
Contextual Info: CY7C1386C CY7C1387C 18-Mb 512K x 36/1M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 225, 200 and 167 MHz • Registered inputs and outputs for pipelined operation

CY7C1360C-250BGC

Abstract: CY7C1360C CY7C1362C CY7C1360C-166BZI
Contextual Info: CY7C1360C CY7C1362C PRELIMINARY 9-Mbit 256K x 36/512K x 18 Pipelined SRAM Functional Description[1] Features • • • • • • • • • • • • • • • • Supports bus operation up to 250 MHz Available speed grades are 250, 200, and 166 MHz

INCOMING PACKAGING MATERIAL INSPECTION form

Abstract: MIL-STD-105C underfill 45X45mm motherboard major problems & solutions Low viscosity underfill for flip chip
Contextual Info: FUJITSU/SUN MICROSYSTEMS ULTRASPARC-IIi MCM: MINIATURIZATION TO THE EXTREME Michelle Hou Fujitsu San Jose, CA USA Takashi Ozawa Fujitsu Kawasaki, JAPAN Dev Malladi, Chris Furman, Mary Krebser, Steve Boyle, Mohsen Saneinejad Sun Microsystems Palo Alto, CA USA

CY7C1325G

Abstract: CY7C1325G-133AXC CY7C1325G-133AXI CY7C1325G-133BGC CY7C1325G-133BGI CY7C1325G-133BGXC CY7C1325G-133BGXI
Contextual Info: CY7C1325G PRELIMINARY 4-Mbit 256K x 18 Flow-Through Sync SRAM Functional Description[1] Features • 256K X 18 common I/O • 3.3V –5% and +10% core power supply (VDD) • 2.5V or 3.3V I/O supply (VDDQ) • Fast clock-to-output times — 6.5 ns (133-MHz version)

CY7C1327B

Contextual Info: 327 CY7C1327B 256K x 18 Synchronous-Pipelined Cache RAM Features The CY7C1327B I/O pins can operate at either the 2.5V or the 3.3V level. The I/O pins are 3.3V tolerant when VDDQ=2.5V. • Supports 100-MHz bus for Pentium and PowerPC operations with zero wait states

CY7C1381B-100AI

Abstract: 381B CY7C1381B CY7C1381B-117AC CY7C1383B
Contextual Info: 381B CY7C1381B CY7C1383B 512 x 36/1M × 18 Flow-Thru SRAM Features • • • • • • • • • • • Fast access times: 7.5, 8.5, 10.0 ns Fast clock speed: 117, 100, 83 MHz Provide high-performance 3-1-1-1 access rate Optimal for depth expansion

80486 microprocessor block diagram and pin diagram

Abstract: CY7C1338B
Contextual Info: 338B CY7C1338B 128K x 32 Synchronous-Flow-Through 3.3V Cache RAM Features Functional Description • Supports 117-MHz microprocessor cache systems with zero wait states • 128K by 32 common I/O • Fast clock-to-output times — 7.5 ns 117-MHz version • Two-bit wraparound counter supporting either interleaved or linear burst sequence

Contextual Info: 1 2 8 K X 3 6 ,2 5 6 K X 1 8 ,3.3V SYNCHRONOUS SRAMS WITH PRELIMINARY 3.3V I/O, FLOW-THROUGH OUTPUTS, IDT71V3577 BURSTCOUNTER, IDT71V3579 SINGLE CYCLE DESELECT D e sc rip tio n F ea tu re s The IDT71V3577/79 are high-speed SRAMs organized as * 128K x 3 6 ,256K x 18 memory configurations

GVT71256ZC36B-7.5

Abstract: CY7C1356A-100AC CY7C1356A GVT71512ZC18
Contextual Info: PRELIMINARY CY7C1354A/GVT71256ZC36 CY7C1356A/GVT71512ZC18 256Kx36/512Kx18 Pipelined SRAM with NoBL Architecture Features • Zero Bus Latency, no dead cycles between write and read cycles • Fast clock speed: 200, 166, 133, and 100 MHz • Fast access time: 3.2, 3.6, 4.2, 5.0 ns

CY7C1381A

Abstract: CY7C1381A-100AC CY7C1381A-117AC CY7C1381A-83AC
Contextual Info: CY7C1381A CY7C1383A PRELIMINARY 512K x 36 / 1M x 18 Flow-Thru SRAM Features • • • • • • • • • • • Fast access times: 7.5, 8.5, 9.0, 10.0 ns Fast clock speed: 117, 100, 83, 66 MHz Provide high-performance 3-1-1-1 access rate Optimal for depth expansion

CY7C1357A

Abstract: GVT71512ZB18
Contextual Info: 1CY7C1357A PRELIMINARY CY7C1355A/GVT71256ZB36 CY7C1357A/GVT71512ZB18 256Kx36/512Kx18 Flow-Thru SRAM with NoBL Architecture Features • Zero Bus Latency, no dead cycles between write and read cycles • Fast clock speed: 133, 117, and 100 MHz • Fast access time: 6.5, 7.0, 7.5, and 8.0 ns

IR 9144

Abstract: ax4500
Contextual Info: Technische Information / Technical Information Lichtzündbarer Netzthyristor mit integriertem Überspannungsschutz Light Triggered Phase Control Thyristor with integrated overvoltage protection T 4003 NH 52 TOH N Vorläufige Daten . Preliminary Data . Features:

CY7C1380BV25

Abstract: CY7C1382BV25
Contextual Info: 1CY7C1380BV25 CY7C1380BV25 CY7C1382BV25 PRELIMINARY 512K x 36 / 1 Mb x 18 Pipelined SRAM Features • • • • • • • • • • • Fast clock speed: 200,166, 150, 133 MHz Provide high-performance 3-1-1-1 access rate Fast OE access times: 3.0,3.2, 3.4, 3.8, 4.2 ns

Contextual Info: CY7C1361C CY7C1363C PRELIMINARY 9-Mbit 256K x 36/512K x 18 Flow-Through SRAM Functional Description[1] Features • Supports 133-MHz bus operations The CY7C1361C/CY7C1363C is a 3.3V, 256K x 36 and 512K x 18 Synchronous Flowthrough SRAMs, respectively designed

CY7C1370DV25-167BZI

Abstract: AE144
Contextual Info: CY7C1370DV25 CY7C1372DV25 PRELIMINARY 18-Mbit 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture Features Functional Description • Pin-compatible and functionally equivalent to ZBT™ The CY7C1370DV25 and CY7C1372DV25 are 2.5V, 512K x 36 and 1 Mbit x 18 Synchronous pipelined burst SRAMs with

CY7C1338B

Abstract: 80486 microprocessor block diagram and pin diagrams
Contextual Info: 338B CY7C1338B 128K x 32 Synchronous-Flow-Through 3.3V Cache RAM Features Functional Description • Supports 117-MHz microprocessor cache systems with zero wait states • 128K by 32 common I/O • Fast clock-to-output times — 7.5 ns 117-MHz version • Two-bit wraparound counter supporting either interleaved or linear burst sequence

Contextual Info: SONY CXA2504N Sample-and-Hold Driver 1C for LCD Description The CXA2504N comprises a 6-channel sampleand-hold circuit and driver for liquid crystal display. Features • Built-in sample-and-hold circuit for phase matching • Sample-and-hold circuit slew rate 280V/|js Typ.