1186B Search Results

dtc12

Contextual Info: DATA SHEET JUNE 1999 Revision 2.0 LXT6251 21 E1 SDH Mapper General Description Features The LXT6251 21E1 Mapper performs asynchronous mapping and demapping of 21 E l PDH signals into SDH. The PDH side interfaces with E l LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard

Contextual Info: IXF6151 28 T1/E1 Mapper Datasheet The IXF6151 28 T1/E1 Mapper performs asynchronous mapping and demapping of 28 T1 and/ or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface.

B1A16

Contextual Info: 1 44DA111 1 1 1 1111111111111111111111234567889ABC1111 DEFCB3213231111 1 C1 6B5A7C19!5CC61ED7CE18BF1BBADAF5"1B"F5A7BC1 466#1B"F5A7BC561AB1$1%1&1 'B6F5CA1AB1C5A7 1AF5CD7CA1(B6A51E& EA1 74C1 *5A1EF7(1D4""6#1F5C18FB11&1AB11&1

sv5 357

Abstract: 2T 002901 ck105 PLS105 30PF 45N3 PLS105A t23112
Contextual Info: Signetics Programmable Logic Devices Product specification Programmable logic sequencer _ i M e .n. 16 x 48 x 8 PLU S 10 5 -4 5 DESCRIPTION FEATURES The PLUS 105-45 is a bipolar programmable state machine of the Mealy type. Both the AND and the OR array are user-program­

MTC27

Abstract: 2x4 TTL demultiplexer 106 35K 045 226 35K AU-AIS Digital Alarm Clock by using ttl MTB 230 P03H GR-253-CORE IXF6151
Contextual Info: IXF6151 28 T1/E1 Mapper Datasheet The IXF6151 28 T1/E1 Mapper performs asynchronous mapping and demapping of 28 T1 and/ or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface.

san francisco telecom

Abstract: X1HB 001H MTC21 SXT6251 MTC11 MTD16 P1396 MTC13 MTC15
Contextual Info: DATA SHEET MAY 1998 Revision 1.1 SXT6251 21 E1 SDH Mapper General Description Features The SXT6251 21E1 Mapper performs asynchronous mapping and demapping of 21 E1 PDH signals into SDH. The PDH side interfaces with E1 LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard Telecom

MTC27

Abstract: 2x4 TTL demultiplexer Pentium MMX 166 Processor MTC13 KLM-1 DTC20 mtc10 VT1536 MTD23 MTD27
Contextual Info: Intel IXF6151 28 T1/E1 Mapper Datasheet ® The Intel IXF6151 performs asynchronous mapping and demapping of 28 T1 and/or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface. Further

2x4 TTL demultiplexer

Contextual Info: Intel IXF6151 28 T1/E1 Mapper Datasheet The Intel® IXF6151 28 T1/E1 Mapper performs asynchronous mapping and demapping of 28 T1 and/or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus

1186

Abstract: vibra 1186B AN114 AN123
Contextual Info: Sensor Highway Compatible Model 1186 Series High Reliability Industrial Accelerometer The model 1186 series accelerometers offer high reliability in industrial FM Approved environments. An integral cable includes strain relief for superior flex and pull strength, and is available with a top or side exit configuration. Low profile design,

X1HB

Abstract: MTC13 LXT625 131-G W J 50
Contextual Info: DATA SHEET JUNE 1999 Revision 2.0 LXT6251 21 E1 SDH Mapper LXT General Description Features The LXT6251 21E1 Mapper performs asynchronous mapping and demapping of 21 E1 PDH signals into SDH. The PDH side interfaces with E1 LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard

DTC24

Abstract: AU-AIS MTC27 vc-4 digital cross connect 226 35K 2x4 TTL demultiplexer Digital Alarm Clock by ttl Digital Alarm Clock by using ttl P03H GR-253-CORE
Contextual Info: IXF6151 28 T1/E1 Mapper Datasheet The IXF6151 28 T1/E1 Mapper performs asynchronous mapping and demapping of 28 T1 and/ or E1 PDH signals into SDH or SONET. The PDH side interfaces with T1/E1 LIUs and framers via NRZ Clock and Data, while the SDH/ SONET side uses a standard Telecom bus interface.

CXD1193

Abstract: CXD1186BQ
Contextual Info: SONY. _ C X D 1198A Q CD-ROM Subcode Decoder Description The CXD1198AQ is a CD-ROM subcode decoder LSI. Features • Realtime error correction of subcodes • Connection possible with DRAM up to 1MB as buffer memory • Automatic generation of sync patterns

X1HB

Abstract: telecom bus DM9000 application Digital Alarm Clock by using ttl LXT6251A 001H LXT6051 MTD10 LXT6282 MTC11
Contextual Info: LXT6251A 21 E1 SDH Mapper Datasheet The LXT6251A 21E1 Mapper performs asynchronous mapping and demapping of 21 E1 PDH signals into SDH. The PDH side interfaces with E1 LIUs and framers via NRZ Clock & Data, while the SDH side uses a standard Telecom bus interface. Further processing by the companion