100MHZ FREQUENCY DIVIDER Search Results

TDFN TAPE

Contextual Info: PCS3P2042B LCD Panel EMI Reduction IC Features Product Description FCC approved method of EMI attenuation. Provides up to 15dB of EMI suppression. Generates a low EMI spread spectrum clock of the input frequency. Input frequency range: 30MHz - 100MHz. Output frequency range: 30MHz - 100MHz

100MHZ

Abstract: 20MHZ 60MHZ PLL2126X 2p2s
Contextual Info: 20MHZ ~ 100MHZ FSPLL PLL2126X PRELIMINARY GENERAL DESCRIPTION The pll2126x is a Phase Locked Loop (PLL) frequency synthesizer. The PLL provide frequency multiplication capabilities. Its output clock frequency FOUT is related to the input clock frequency FIN by the following

100MHz FREQUENCY DIVIDER

Abstract: 100MHZ 20MHZ 60MHZ PLL2128X
Contextual Info: 20MHZ ~ 100MHZ FSPLL PLL2128X PRELIMINARY GENERAL DESCRIPTION The pll2128x is a Phase Locked Loop (PLL) frequency synthesizer. The PLL provide frequency multiplication capabilities. Its output clock frequency FOUT is related to the input clock frequency FIN by the following

100MHZ

Abstract: PLL2109X digital pll 500MHz
Contextual Info: 100MHZ ~ 500MHZ FSPLL PLL2109X PRELIMINARY GENERAL DESCRIPTION The pll2109x is a Phase Locked Loop(PLL) frequency synthesizer. The PLL provides frequency multiplication capabilities. Its output clock frequency FOUT is related to the input clock frequency FIN by the following

100MHZ

Abstract: PLL2115X
Contextual Info: 100MHZ ~ 500MHZ FSPLL PLL2115X PRLIMINARY GENERAL DESCRIPTION The pll2115x is a Phase Locked Loop(PLL) frequency synthesizer. The PLL provides frequency multiplication capabilities. Its output clock frequency FOUT is related to the input clock frequency FIN by the following

100MHZ

Abstract: 20MHZ 60MHZ PLL2127X PLL 100Mhz
Contextual Info: 20MHZ ~ 100MHZ FSPLL PLL2127X PRELIMINARY GENERAL DESCRIPTION The pll2127x is a Phase Locked Loop (PLL) frequency synthesizer. The PLL provide frequency multiplication capabilities. Its output clock frequency FOUT is related to the input clock frequency FIN by the following

100MHz FREQUENCY DIVIDER

Abstract: circuit diagram power output 70 dcv
Contextual Info: 20MHz ~ 100MHz FSPLL BW2011L DEC 1998 Version1.0 General Description Features The BW2011L is a Phase-Locked Loop PLL frequency synthesizer constructed in CMOS on single monolithic structure. The PLL macrofunctions provide frequency multiplication capabilities.

DS1073

Abstract: DS1073M-XXX
Contextual Info: DS1073 3V EconOscillator/Divider www.maxim-ic.com FEATURES § § § § § § § § § § § Dual fixed-frequency outputs 30kHz to 100MHz User-programmable on-chip dividers (from 1 to 513) User-programmable on-chip prescaler (1, 2, 4) No external components

WED3C750A8M-200BX

Contextual Info: White Electronic Designs WED3C750A8M-200BX RISC Microprocessor Module OVERVIEW • Maximum L2 Cache frequency = 100MHz The WEDC 750/SSRAM module is targeted for high performance, space sensitive, low power systems and supports the following power management features:

X-tal SMD 24MHz 18pF

Abstract: FL2500 2.4GHZ synthesizer PCI express Layout
Contextual Info: PI6LC4831A Crystal to Differential HCSL/LVCMOS Frequency Synthesizer Features Description ÎÎ3.3V The PI6LC4831A clock generator supports networking systems requiring 25MHz for ethernet and 100MHz for PCIe applications. This novel part includes both a low phase noise VCO and

CMX998

Abstract: 2D998
Contextual Info: CMX998 CML Microcircuits COMMUNICATION SEMICONDUCTORS Cartesian Feed-back Loop Transmitter D/998/7 October 2007 Features • Frequency Range 100MHz to 1GHz • Wide Band Noise –148dBc/Hz • C-BUS SPI compatible Serial Interface • Gain Control • Error Amplifier

100mhz ring oscillator

Abstract: oscillator 2.4Gh 2.4GHZ synthesizer PCI express Layout
Contextual Info: PI6LC4831A Crystal to Differential HCSL/LVCMOS Frequency Synthesizer Features Description ÎÎ3.3V The PI6LC4831A clock generator supports networking systems requiring 25MHz for ethernet and 100MHz for PCIe applications. This novel part includes both a low phase noise VCO and

Contextual Info: CMX998 CML Microcircuits COMMUNICATION SEMICONDUCTORS D/998/6 July 2007 Features • Frequency Range 100MHz to 1GHz • Wide Band Noise –148dBc/Hz • C-BUS SPI compatible Serial Interface • Gain Control • Error Amplifier • Up Converter Forward Path

Contextual Info: CMX998 CML Microcircuits COMMUNICATION SEMICONDUCTORS Cartesian Feed-back Loop Transmitter D/998/8 January 2008 Features • Frequency Range 100MHz to 1GHz • Wide Band Noise –148dBc/Hz • C-BUS SPI compatible Serial Interface • Gain Control • Error Amplifier

Contextual Info: fax id: 3546 mmmttttmm^ _jgg. CY2280 8wwy Pentium II 100MHz Clock Synthesizer/ Driver for Desktop PCs 14.318 MHz, and two 2.5V APIC clocks at 14.318 MHz -1, -3 or at one-half the PCI frequency (-2). The full selector guide for all options is shown below.

LDB212G4

Abstract: LDB181G8405C-110
Contextual Info: Microwave Components Microwave Components Chip Multilayer Hybrid Couplers Hybrid Dividers 2.00±0.10 2 0.95±0.10 (1) 1.25±0.10 (3) (5) (6) LDD211G6103A-095 0.30 -0.2 (4) 0.30±0.10 0.35±0.10 0.20 0.65±0.05 ±0.10 +0.1 Directional Input Mark (1) GND (2) IN

Contextual Info: XR81111 Universal Clock - High Frequency LVPECL Clock Synthesizer General Description FEATURES The XR81111-CA04 is a clock synthesizer with Integer divider, LVPECL driver, 3.3V/2.5V supply, taking a 25MHz Xtal input and providing one of four selectable output frequencies. The device is optimized for use with a 25MHz

100MHz FREQUENCY DIVIDER

Abstract: Frequency multiplier 1mHz 100MHz transistor 6c x 5652 XC25BS7 1MHz Frequency Generator ic
Contextual Info: 8F Sakura Nihonbashi Bldg., 1-13-12, Nihonbashikayaba-cho, Chuo-ku, Tokyo 103-0025 Japan Tel: +81-3-5652-8700 Fax: +81-3-5652-8701 http://www.torex.co.jp/english/ PRESS RELEASE ＴＲＸ028 September 14, 2007 XC25BS7 Series PLL Clock Generator ICs with Built-In Divider/Multiplier Circuits

ABLNO-EVAL

Contextual Info: Frequency Divider Evaluation Board ABLNO- EVAL Pb RoHS Compliant 60.4 x 42.7 x 13.0 mm | | | | | | | | | | | | | | | OVERALL CAPABILITY ABLNO-EVAL; Frequency Divider Evaluation Board shown in figure 1 is designed to facilitate engineering evaluation of Abracon’s Ultra Low Noise – ABLNO series of fixed clock and voltage controlled crystal oscillators.

ICS950508

Abstract: SEL24 inv 1708
Contextual Info: ICS950508 Integrated Circuit Systems, Inc. Programmable Timing Control Hub for PII/III™ Recommended Application: 810/810E/815 and 815 B-Step type chipset Features/Benefits: • Programmable output frequency. • Programmable output divider ratios. •

Contextual Info: SP4634 SP4634 1GHz -r 64 DUAL INPUT PRESCALER The SP4634 is one of the new range of Plessey consumer high speed dividers which offer improved input sensitivity, higher input impedance and lower supply current. The device is intended for use in television frequency synthesis

ICS950602

Abstract: PLE133T CK408B
Contextual Info: ICS950602 Integrated Circuit Systems, Inc. Programmable Timing Control Hub for PII/III™ Recommended Application: VIA Mobile PL133T and PLE133T Chipsets. Features/Benefits: • Programmable output frequency. • Programmable output divider ratios. •

Phase Shifter 100mhz

Abstract: SM5165AV
Contextual Info: SM5165AV PLL Synthesizer IC OVERVIEW The SM5165AV is a PLL synthesizer IC developed for application in pagers and fabricated using NPC’s Molybdenum-gate CMOS process. It incorporates independently-controlled reference frequency and operating frequency dividers, and operates from a low-voltage supply to realize low power dissipation.

Contextual Info: PI6C49004 Networking Clock Generator Description Features The PI6C49004 is a clock generator device intended for PCIe / networking applications. The device includes twelve 100MHz differential Host Clock Signal Level HCSL outputs for PCIe, two single-ended 50MHz outputs, one single-ended 32.256MHz