175PS Search Results

ADG3246

Abstract: ADG3246BCP ADG3246BRU
Contextual Info: PRELIMINARY TECHNICAL DATA = Preliminary Technical Data FEATURES 175ps Propagation Delay through the switch 3.5 Ω Switch Connection between Ports 2.5 V/3.3 V Supply Operation Selectable Level Shifting/Translation Level Translation 3.3 V to 2.5 V 3.3 V to 1.8 V

Contextual Info: C9914 Clock Generator for 100MHz and 133.3MHz Mobile Applications Preliminary Frequency Table MHz Product Features • Supports Intel 440BX, and VIA Promedia chipsets • Supports mobile Pentium II and Pentium III • 2 REF clocks • 2 Low Skew (<175pS) CPU clocks

ADG3247

Abstract: 2.5 V to 5 V level translation ADG3247BCP ADG3247BRU CP-40
Contextual Info: PRELIMINARY TECHNICAL DATA = Preliminary Technical Data FEATURES 175ps Propagation Delay through the switch 3.5 Ω Switch Connection between Ports 2.5 V/3.3 V Supply Operation Selectable Level Shifting/Translation Level Translation 3.3 V to 2.5 V 3.3 V to 1.8 V

ADG3247

Contextual Info: PRELIMINARY TECHNICAL DATA a Preliminary Technical Data FEATURES 175ps Propagation Delay through the switch 3.5 Ω Switch Connection between Ports 2.5 V/3.3 V Supply Operation Selectable Level Shifting/Translation Level Translation 3.3 V to 2.5 V 3.3 V to 1.8 V

Contextual Info: : •> HOLTEK * HT82T48-39 Frequency Generator and Integrated Buffers for PENTIUM/Pro TM Features • • • • • • • • No external load cap for C L=18pF cry stals ± 175ps CPU , P C I clock skew 250ps cycle to cycle C PU jitte r Sm ooth frequency switch, w ith selections

ADG3245

Abstract: ADG3245BCP ADG3245BRU RU-20
Contextual Info: PRELIMINARY TECHNICAL DATA = Preliminary Technical Data FEATURES 175ps Propagation Delay through the switch 3.5 Ω Switch Connection between Ports 2.5 V/3.3 V Supply Operation Selectable Level Shifting/Translation Level Translation 3.3 V to 2.5 V 3.3 V to 1.8 V

UCCD9112RHB

Abstract: UCD7230 UCD9110 UCD9112 UCD9112RHBR VD25
Contextual Info: UCD9112 www.ti.com SLVS711 – SEPTEMBER 2006 Digital Dual-Phase Synchronous Buck Controller • • • • • • • • • • • • • • • • Digital Dual-Phase Synchronous Buck PWM Controller with 175ps PWM Resolution Digital Control with Programmable PID

C9914

Contextual Info: PRELIMINARY C9914 Clock Generator for 100MHz and 133.3MHz Mobile Applications Product Features Frequency Table MHz HFS# 1 1 • Supports Intel 440BX, and VIA Promedia chipsets • Supports mobile Pentium II and Pentium III • 2 REF clocks • 2 Low Skew (<175pS) CPU clocks

smbus

Contextual Info: UCD9112 www.ti.com SLVS711 – SEPTEMBER 2006 Digital Dual-Phase Synchronous Buck Controller • • • • • • • • • • • • • • • • Digital Dual-Phase Synchronous Buck PWM Controller with 175ps PWM Resolution Digital Control with Programmable PID

FS41

Abstract: ICS9248-151 SEL24 3OP10
Contextual Info: Integrated Circuit Systems, Inc. ICS9248-151 Frequency Generator & Integrated Buffers for Celeron & PII/III Pin Configuration VDDREF GND X1 X2 AVDD48 *FS3/48MHz *FS2/24_48MHz GND PCICLK_F PCICLK0 PCICLK1 GND PCICLK2 PCICLK3 VDDPCI PCICLK4 PCICLK5 PCICLK6

Contextual Info: IMI SC657 ¡‘nt&iTnstions!M ktotifsvO s, In t Clock Generator w/Power Management for Mobile Application Preliminary FREQUiENCY TABLE PRODUCT FEA TURES • ■ ■ ■ ■ ■ ■ ■ Supports clock requirements for Mobile Pentium Processor 2 Host and 6 PCI clocks

Contextual Info: C9716 100 MHz Clock Generator with SSCG and Power Management for Mobile Application P relim ina ry PRODUCT FEA TURES • FREQUENCY TABLE Supplies: 2 Ref clocks 2 Host CPU clocks CPU Clock 66 MHz 100 MHz sel 100/66# 1 33 MHz 33 MHz 1 free running and 5 PCI Clocks

Contextual Info: ill# ICW0RKS Advance Information W48S111-14 Spread Spectrum Desktop / Notebook System Frequency G enerator Features Key Specifications • Maximized EMI suppression using IC W O R K S ’ Spread Spectrum Technology • Reduces measured EMI by as much as 10dB

Contextual Info: Preliminary ill# ICW 0RKS W48C111-16 Frequency Generator for Integrated Core Logic Features Maximized EMI suppression using IC W O R K S ’ Spread Spectrum Technology Supply Voltages: Power on default to spread mode Two copies of CPU output Six copies of PCI output Synchronous w/CPU outputs

IMISC657GYB

Abstract: SC657
Contextual Info: SC657 Clock Generator w/Power Management for Mobile Application Preliminary FREQUENCY TABLE PRODUCT FEATURES T T T T T T T T  Supports clock requirements for Mobile Pentium Processor 2 Host and 6 PCI clocks Separate supply pins for mixed 3.3/2.5V voltage

FS01

Abstract: ICS94206
Contextual Info: Integrated Circuit Systems, Inc. ICS94206 Programmable System Frequency Generator for PII/III Features: • Programmable ouput frequency. • Programmable ouput rise/fall time. • Programmable PCI_F and PCICLK skew. • Spread spectrum for EMI control typically by 7dB to

SIS 648

Abstract: W83194BR-648 wibond
Contextual Info: W83194BR-648 Data Sheet WIBOND CLOCK GENERATOR FOR SIS P4 SERIES CHIPSET -I- Publication Release Date: April 13, 2005 Revision 1.1 W83194BR-648 Table of Contents1. GENERAL DESCRIPTION .1

CFPP-57

Contextual Info: IQD Frequency Products Oscillator Specification Incorporating IQD FOQ GmbH Model: CFPP-57 ISSUE 9; February 2012 - RoHS 2011/65/EU Description PLL based, one time only factory programmable for a fast lead time Crystal oscillator in a plastic encapsulated ‘J’ leaded SMD package

Contextual Info: PCS5I961P November 2006 rev 0.3 Low Voltage Zero Delay Buffer Features reference clock while the PCS5I961P offers an LVPECL reference clock. • Fully Integrated PLL • Up to 200MHz I/O Frequency When pulled high the OE pin will force all of the outputs •

ICS9179-03

Abstract: ICS9248 ICS9248-50 cpu power supply diagram
Contextual Info: Integrated Circuit Systems, Inc. ICS9248-50 Frequency Timing Generator for Pentium II Systems General Description Features The ICS9248-50 is the Main clock solution for Notebook designs using the Intel 440BX style chipset. Along with an SDRAM buffer such as the ICS9179-03, it provides all

Contextual Info: FMM362HG/HE FMM363HG/HE _ GaAs Standard Logic Integrated Circuit FEATURES • • • • • • • • • Ultra high speed operation up to 5 GHz from DC Fast rise and fall time less than 80 ps High input sensitivity: typ. 150mVp-p at 4 GHz FMM362HG/HE

slot AGP 124 pin

Abstract: SiS chipset W83194BR-640
Contextual Info: W83194BR-640 166MHZ CLOCK FOR SIS CHIPSET W83194BR-640 Data Sheet Revision History Pages Dates Version Version Main Contents On Web 1 n.a. 2 n.a. 02/Apr 1.0 n.a. All of the versions before 0.50 are for internal use. 1.0 Change version and version on web site to 1.0

XRK69774

Abstract: XRK69774CR XRK69774IR
Contextual Info: XRK69774 PRELIMINARY 1:14 LVCMOS PLL CLOCK GENERATOR APRIL 2006 REV. P1.0.1 GENERAL DESCRIPTION to125MHz and an input frequency range of 4.16MHz to 62.5MHz. The XRK69774 is a PLL based LVCMOS Clock Generator targeted for high performance and low skew clock distribution applications. The XRK69774 can select between one

Contextual Info: ill# Advance Information W204 IC WORKS Spread Spectrum FTG for 440BX and VIA Apollo Pro-133 Features Programmable clock outputs up to 155 MHz via l2C inter­ face 32 selectable frequencies • Maximized EMI suppression using IC W ORKS’ spread spectrum technology