10 35L A8 Search Results

Contextual Info: intei 51C68 HIGH SPEED CHMOS 4096 x 4-BIT STATIC RAM 51C68-30 51C68-35 51C68-35L Max. Access Time ns 30 35 35 Max. Active Current (mA) 90 90 65 Max. Standby Current (mA) 10 10 5 Double Metal CHMOS III Technology High Density 20-Pin Package Completely Static Memory-No Clock

10 35L

Contextual Info: hEMTÖSS 00243^1 3b4 • M I T I MITSUBISHI LS Is M5M5259CP, J-15,-20,-25,-35, -20L,-25L,-35L 262144-BIT 65536-WORD BY 4-BIT CMOS STATIC RAM (WITH OE) DESCRIPTION The M5M5259C is a family of 65536 word by 4-bit static RAMs with OE input, fabricated with the high-performance

Contextual Info: blE D bSMTöBS 00SÜ031 215 IMITI MITSUBISHI LSIs M5M5257AP,J-25,-30,-35,-45, -30L,-35L,-45L 2 6 2 1 4 4 -B IT 2 6 2 1 4 4 -WORD BY l-B IT C M O S STATIC RAM MITSUBISHI (MEMORY/ASIC) DESCRIPTION P IN C O N F IG U R A T IO N (T O P V IE W ) The M5M5257A is a fam ily o f 262144-word by 1-bit static

Contextual Info: MITSUBISHI LS Is M 5 M 5 2 5 9 C P , J -1 5 ,-2 0 ,-2 5 ,-3 5 , -2 0 L ,-2 5 L ,-3 5 L 262144-BIT 65536-WORD BY 4-BIT CMOS STATIC RAM (WITH OE) DESCRIPTION The M5M5259C is a family of 65536 word by 4-bit static RAMs with 0E input, fabricated with the high-performance

Contextual Info: MITSUBISHI LS Is M5M5259CP, J-15,-20,-25,-35, -20L,-25L,-35L 262144-BIT 65536-WORD BY 4-BIT CMOS STATIC RAM (WITH OE) DESCRIPTION The M5M5259C is a family of 65536 word by 4-bit static PIN CONFIGURATION (TOP VIEW) RAMs with 0E input, fabricated with the high-performance

Contextual Info: MITSUBISHI LS Is M5M51004P,J-25,-35,-45,-25L,-35L,-45L 1048576-BIT 262144-WORD BY 4-BIT CMOS STATIC RAM DESCRIPTION The M5M51004 is a family of 262144-word by 4-bit static RAMs, fabricated with the high-performance CMOS silicon- PIN CONFIGURATION (TOP VIEW)

M5M51004

Contextual Info: M5M51004P,J-25,-35,-45,-25L,-35L,"4E L 1048576-BIT 262144-WORD BY 4-BIT) CMOS STATIC RAM DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M5M51004 is a family of 262144-word by 4-bit static RAMs, fabricated with the high-performance CMOS silicon V c c (5 \0 gate process and designed for high-speed application. These

M5M5258cp

Abstract: 10 35L 5258C 10 35L A8
Contextual Info: MITSUBISHI LS Is M5M5258CP, J-15,-20,-25,-35, -20L,-25L,-35L 262144-BIT 65536-WORD BY 4-BIT CMOS STATIC RAM DESCRIPTION The M 5M 5258C is a fam ily o f 6 5 5 3 6 w ord by 4-bit static PIN CONFIGURATION (TOP VIEW) RAMs, fabricated w ith the high-performance CMOS silicongate

510042

Contextual Info: MITSUBISHI LS Is M5M51004P,J-25,-35,-45,-25L,-35L,-45L 1048576-BIT 262144-WORD BY 4-BIT CMOS STATIC RAM DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M 5 M 5 1 0 0 4 is a fam ily o f 262144-w ord by 4-bit static RAMs, fabricated w ith the high-performance CMOS silicon

AS8S512K32

Contextual Info: SRAM AS8S512K32 & AS8S512K32A 512K x 32 SRAM OPTIONS SRAM MEMORY ARRAY Operating Temp. Ranges Full Military -55oC to +125oC Military (-55oC to +125oC) Industrial (-40oC to +85oC) Markings Q & 883 XT IT Timing 12ns 15ns 17ns 20ns Timing 25ns 35ns 45ns 55ns

128K x 8 Static RAM

Abstract: 5962-8959812MYA 5962-8959810MZ
Contextual Info: L7C108 L7C109 128K x 8 Static RAM Pin Configuration     32-pin Ceramic DIP 32-pin Ceramic SOJ NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ1 DQ2 DQ3 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A15 CE2 WE A13

Contextual Info: PRELIMINARY INFORMATION L7C108 L7C109 128K x 8 Static RAM Pin Configuration 32-pin Ceramic DIP 32-pin Ceramic SOJ NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ1 DQ2 DQ3 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17

D-P5DW

Abstract: 10 35L W1 double acting cylinder 10 35L CAP CDQ2B63 D-J79W ya10 THREAD ROD 11-CQ2 CQ2B16-PS
Contextual Info: Compact Cylinder: Standard Type Double Acting, Single Rod Series CQ2 ø12, ø16, ø20, ø25, ø32, ø40, ø50, ø63, ø80, ø100 How to Order Without auto switch With auto switch CQ2 B 20 30 D CDQ2 B 20 30 D J79W S Built-in magnet Ȝ Ȝ Mounting style Ȝ B Through-hole Standard F Rod side flange style

U62H64

Abstract: ZMD AG
Contextual Info: U62H64 Automotive Fast 8K x 8 SRAM Features Description ! Fast 8192 x 8 bit static CMOS The U62H64 is a static RAM manufactured using a CMOS process technology with the following operating modes: - Read - Standby - Write - Data Retention The memory array is based on a

TSOP 1378

Abstract: 62C1024 IS62LV1024L IS62LV1024LL
Contextual Info: IS62LV1024L IS62LV1024L/LL IS62LV1024LL ISSI 128K x 8 LOW POWER and LOW Vcc CMOS STATIC RAM FEATURES • Access times of 35, 45, 50, and 70 ns • Low active power: 60 mW typical • Low standby power: 15 µW (typical) CMOS standby • Low data retention voltage: 2V (min.)

chn 45L

Contextual Info: IS62LV1024L IS62LV1024LL ISSI 128K x 8 LOW POWER and LOW Vcc CMOS STATIC RAM PRELIMINARY SEPTEMBER 1998 FEATURES DESCRIPTION • A c c e s s tim e s o f 3 5 , 4 5 , 5 0 , a n d 7 0 ns • L o w a c tiv e p o w e r: 6 0 m W ty p ic a l • L o w s ta n d b y p o w e r: 15 fiW (ty p ic a l) C M O S

Contextual Info: WS57C49C HIGH SPEED 8Kx 8 CMOS PROM/RPROM KEY FEATURES • Pin Compatible with Bipolar PROMs • Immune to Latch-UP • Ultra-Fast Access Time — *ACC = 2 5 n s — — Up to 200 mA t CS = 1 2 n s • Low Power Consumption • Fast Programming • ESD Protection Exceeds 2000 V

TSOP 1378

Abstract: 45ti 62C1024 IS62LV1024L IS62LV1024LL IS62LV1024LL-70TI
Contextual Info: IS62LV1024L IS62LV1024L/LL IS62LV1024LL ISSI 128K x 8 LOW POWER and LOW Vcc CMOS STATIC RAM FEATURES • Access times of 35, 45, 50, and 70 ns • Low active power: 60 mW typical • Low standby power: 15 µW (typical) CMOS standby • Low data retention voltage: 2V (min.)

transistor A144

Abstract: CY7C056V CY7C057V
Contextual Info: 1 CY7C056V CY7C057V PRELIMINARY 3.3V 16K/32K x 36 FLEx36 Asynchronous Dual-Port Static RAM • Expandable data bus to 72 bits or more using Master/Slave Chip Select when using more than one device • On-Chip arbitration logic • Semaphores included to permit software handshaking

IS62LV1024

Contextual Info: IS62LV1024L IS62LV1024LL m â 128K x 8 LOW POWER and LOW Vcc CMOS STATIC RAM PRELIMINARY SEPTEMBER 1998 FEATURES DESCRIPTION • Access times of 35, 45, 50, and 70 ns The IS62LV1024L and IS62LV1024LL are low power and low Vcc, 131,072-word by 8-bit CMOS static RAMs. They

TSOP 1378

Abstract: 62C1024
Contextual Info: IS62LV1024L IS62LV1024LL ISSI 128K x 8 LOW POWER and LOW Vcc CMOS STATIC RAM p r e l im in a r y AUGUST 1997 FEATURES DESCRIPTION • A c c e s s tim e s of 35, 45, 50, and 70 ns The IS S IIS62LV1024L and IS62LV1024LL are low power and low Vcc, 131,072-word by 8-bit CMOS static RAMs. They

PK131

Contextual Info: IS62LV1024L IS62LV1024LL ISSI 128K x 8 LOW POWER and LOW Vcc CMOS STATIC RAM p r e l im in a r y OCTOBER 1997 FEATURES DESCRIPTION • Access times of 35, 45, 50, and 70 ns The IS S IIS62LV1024L and IS62LV1024LL are low power and low Vcc, 131,072-word by 8-bit CMOS static RAMs. They

Contextual Info: Prelim inary CMOS SRAM KM 68V4002B/BL, KM 68V4002BI/BLI D o cu m e n t Title 512K x8 Bit High Speed Static RAM 3.3V Operating , Revolutionary Pin out. Operated at Com m ercial and Industrial Tem perature Range. R evision H istory D raft Data R em ark R ev No.

Contextual Info: • H Y U N D A I H Y 5 1 4 4 1 O A S e r ie s 1M x 4-bit CMOS DRAM with Write-Per-BIt DESCRIPTION The HY514410A is the 2nd generation and fast dynamic RAM organized 1,048,576 x 4-bit with function of Write-Per-Bit. TVte HY514410A utilizes Hyundai’s CMOS silicon gate process technology as well as advanced