0X77F Search Results

LPC2300

Abstract: LPC2400 NXP LPC2000 CAN driver with FullCAN mode LPC2900 lcd display MDK311 AN10674 mcb2300 lcd display program in keil uvision3 mdk311 LP2900
Contextual Info: AN10674 NXP LPC2000 CAN driver with FullCAN mode Rev. 01 — 10 January 2008 Application note Document information Info Content Keywords Application Note, CAN Bus, Full CAN, LPC2000, ARM7, SJA1000 Abstract This application note describes the Full CAN driver routines for the CAN

ATMEL 649v

Abstract: 6490V ATMEGA329 TWI avr adc
Contextual Info: Features • High Performance, Low Power Atmel AVR® 8-Bit Microcontroller • Advanced RISC Architecture • • • • • • • • – 130 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation

ATmega32H

Abstract: PV15100 PCIE10 atmel 718 ac chopper ATMEGA64HVE2
Contextual Info: Atmel ATmega32HVE2/ATmega64HVE2 8-bit AVR Microcontroller with Precise Analog Frontend for very Accurate Voltage and Current Measurement PRELIMINARY DATASHEET Features ● Single-package fully-integrated ● High precision analog frontend ● 17bit single-ended voltage-ADC

SPRS372G

Contextual Info: TMS320DM647 TMS320DM648 SPRS372G – MAY 2007 – REVISED NOVEMBER 2011 www.ti.com TMS320DM647/TMS320DM648 Digital Media Processor Check for Samples: TMS320DM647, TMS320DM648 1 Features 1 • High-Performance Digital Media Processor – 720-MHz, 800-MHz, 900-MHz, 1.1-GHz

Contextual Info: TMS320DM647 TMS320DM648 Digital Media Processor www.ti.com SPRS372D – MAY 2007 – REVISED APRIL 2009 1 TMS320DM647, TMS320DM648 Digital Media Processor 1.1 Features • • • High-Performance Digital Media Processor – 720-MHz, 800-MHz, 900-MHz C64x+ Clock

SS 1091 asn

Abstract: atmel sine wave pwm circuit atmega 128 atmel atmega 382 SM200 DSAQ00265166. ATMEGA USART programming example ATMEGA 326
Contextual Info: Features • • • • • • • • • • • High Performance, Low Power Atmel AVR® 8-Bit Microcontroller Advanced RISC Architecture – 130 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers

DSP56300

Abstract: DSP56307 DSP56311 MSC8101 SC140
Contextual Info: Order Number: AN2084/D Rev. 0, 3/2001 MOTOROLA Semiconductor Products Sector Application Note Differences Between the DSP56300 and MSC8101 Enhanced Filter Coprocessors EFCOPs By Tina M. Redheendran The Enhanced Filter Coprocessor (EFCOP) is a general-purpose,

ATMEGA1280-16AU

Abstract: avr 2560 atmega1280 avr 328 pc 2561 2549K-AVR-01 PJ63 TQFP64 package
Contextual Info: Features • High Performance, Low Power AVR 8-Bit Microcontroller • Advanced RISC Architecture • • • • • • • • – 135 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation

TNETX3100

Abstract: DD35 ED11 TNETX15AE TNETX3150 TNETX3150A
Contextual Info: TNETX15AE ADDRESS-LOOKUP DEVICE SPWS041A – AUGUST 1997 – REVISED OCTOBER 1997 D D D D D D D D Provides up to 8K-Address Matching System Provides Glueless External-Address Match EAM Interface to the TNETX3150/TNETX3150A/TNETX3100 Uses Standard Off-the-Shelf 15-ns SRAMs

Contextual Info: xr XR17C158 5V PCI BUS OCTAL UART JANUARY 2005 REV. 1.4.2 GENERAL DESCRIPTION The XR17C1581 158 is an octal Universal Asynchronous Receiver and Transmitter (UART). The device is designed to meet the 32-bit PCI Bus and high bandwidth requirement in communication

Divide by N Counter

Contextual Info: áç XR17C158 5V PCI BUS OCTAL UART MAY 2004 REV. 1.4.0 GENERAL DESCRIPTION The XR17C1581 158 is an octal Universal Asynchronous Receiver and Transmitter (UART). The device is designed to meet the 32-bit PCI Bus and high bandwidth requirement in communication systems.

exar timer

Contextual Info: áç XR17C154 PRELIMINARY 5V PCI BUS QUAD UART APRIL 2001 REV. P1.0.0 GENERAL DESCRIPTION The XR17C1541 154 is a quad PCI Bus Universal Asynchronous Receiver and Transmitter (UART) with same package and pin-out as the Exar XR17C158 octal UART. The device is designed to meet today’s

Contextual Info: áç XR17C158 PCI BUS OCTAL UART AUGUST 2001 REV. 1.1.2 GENERAL DESCRIPTION The XR17C1581 158 is an octal Universal Asynchronous Receiver and Transmitter (UART). The device is designed to meet the 32-bit PCI Bus and high bandwidth requirement in communication systems.

XR17C158

Contextual Info: áç XR17C158 5V PCI BUS OCTAL UART SEPTEMBER 2003 REV. 1.3.0 GENERAL DESCRIPTION The XR17C1581 158 is an octal Universal Asynchronous Receiver and Transmitter (UART). The device is designed to meet the 32-bit PCI Bus and high bandwidth requirement in communication systems.

rx2 99

Abstract: 93c46l 93c46li 16C550 AD29 AD30 XR17V258 bu 515 144LQFP 16550
Contextual Info: XR17V258 66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT AUGUST 2010 REV. 1.0.2 GENERAL DESCRIPTION The XR17V2581 V258 is a single chip 8-channel 66MHz PCI (Peripheral Component Interconnect) UART (Universal Asynchronous Receiver and Transmitter)

sandisk eMMC 4.41

Abstract: toshiba emmc 4.4 spec SANDISK inand Samsung eMMC 4.41 sandisk emmc 4.5 bcm 4330 programming Guide Sandisk iNAND eMMC toshiba emmc 4.4 linux toshiba emmc 4.4.1 spec sandisk inand extreme emmc
Contextual Info: An addendum for this document is available. See Document ID#: IMX25RMAD. i.MX25 Multimedia Applications Processor Reference Manual Supports i.MX251 MCIMX251 i.MX253 (MCIMX253) i.MX255 (MCIMX255) i.MX257 (MCIMX257) i.MX258 (MCIMX258) IMX25RM Rev. 1 06/2009

59013 h 331

Abstract: 59014 c 331 comcode 105 736 490 fcs 9013 GR-253-CORE JT-G704 JT-G706 TMXL28155 TR-62411 59014 c
Contextual Info: Preliminary Data Sheet, Rev 2 June, 2002 TMXL28155 SupermapperLite 155/51 Mbits/s SONET/SDH x28/x21 DS1/E1 1 Features • ■ Versatile IC supports 155/51 Mbits/s SONET/SDH interface solutions for T3, DS2, and T1/E1/J1 applications. Implementation supports both linear 1 + 1, unprotected and ring (UPSR) network topologies.

at90can32-16au

Abstract: MOB2 module AT90CAN128 AT90CAN32 AT90CAN64 SP12 SP13 SP14 SP15 ni 400 le
Contextual Info: Features • High-performance, Low-power AVR 8-bit Microcontroller • Advanced RISC Architecture • • • • • • • • • – 133 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers + Peripheral Control Registers

S1C17705

Abstract: S5U1C17001C S1C17
Contextual Info: CMOS 16-BIT SINGLE CHIP MICROCOMPUTER S1C17705 Technical Manual Rev.1.0 NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability

S1C33000

Abstract: S1C33L01 E0C33202 E0C33204 E0C33208 E0C33A104 EPOD332128
Contextual Info: MF1097-03 CMOS 32-BIT SINGLE CHIP MICROCOMPUTER S1C33000 Core CPU Manual NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any

HY29F800T

Abstract: PSOP 44 Pattern HY29F800B
Contextual Info: HY29F800 8 Megabit 1Mx8/512Kx16 , 5 Volt-only, Flash Memory KEY FEATURES n 5 Volt Read, Program, and Erase – Minimizes system-level power requirements n High Performance – Access times as fast as 55 ns n Low Power Consumption – 20 mA typical active read current in byte

Contextual Info: HY29LV400 4 Mbit 512K x 8/256K x 16 Low Voltage Flash Memory KEY FEATURES n Single Power Supply Operation n n n n n n n n – Read, program and erase operations from 2.7 to 3.6 volts – Ideal for battery-powered applications High Performance – 70 and 90 ns access time versions for full

ATMEGA324 board

Abstract: ATmega644-20AU
Contextual Info: Features • High-performance, Low-power AVR 8-bit Microcontroller • Advanced RISC Architecture • • • • • • • – 131 Powerful Instructions – Most Single-clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation

atmega128 usart code example

Abstract: M103C SP10 SP11 SP12 SP13 SP14 SP15
Contextual Info: Features • High-performance, Low-power AVR 8-bit Microcontroller • Advanced RISC Architecture • • • • • • • – 130 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers + Peripheral Control Registers