0TBL723 Search Results

AS09

Abstract: AS639 SN74ALS638A SN74ALS639A SN74AS638A SN74AS639 phl1035
Contextual Info: SN74ALS638A, SN74ALS639A, SN74AS638A, SN74AS639 OCTAL BUS TRANSCEIVERS D2661, DECEMBER 1983 - REVISED MARCH 1987 • Bidirectional But Transceivers in HighDensity 20-Pin Packages SN 74ALS', SN 74 A S '. . . DW OR N PACKAGE TOP VIEW • Choica of Trua or Inverting Logic

SN74LVC16245A

Contextual Info: SN74LVC16245A 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES062D—DECEMBER 1995 - REVISED FEBRUARY 1997 Member of the Texas Instruments Widebus Family DGG OR DL PACKAGE TOP VIEW EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process 1DIR [ 1

SN74ACT7808

Contextual Info: SN74ACT7808 2048 x 9 FIRST-IN, FIRST-OUT MEMORY SCAS205A - FEBRUARY 1991 - REVISED AUGUST 1994 Load Clocks and Unload Clocks Can Be Asynchronous or Coincident 2048 Words by 9 Bits Low-Power Advanced CMOS Technology Fast Access Times of 15 ns With a 50-pF Load

SN54LVT162244wd

Abstract: LVT162244 Scans-005334
Contextual Info: SN54LVT162244, SN74LVT162244 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS S C BS268A-JU NE 1993 - REVISED FEBRUARY 1994 Output Ports Have Equivalent 22-Q Series Resistors, So No External Resistors Are Required State-of-the-Art Advanced BiCMOS Technology ABT Design for 3.3-V

SN74ACT7803

Abstract: SN74ACT7805 SN74ACT7813 SN74ALVC7803 SN74ALVC7805 SN74ALVC7813
Contextual Info: SN74ALVC7803, SN74ALVC7805, SN74ALVC7813 512x 18, 256x 18, 64x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORIES SCAS436 - JUNE 1994 DL PACKAGE TOP VIEW Free-Running Read and Write Clocks Can Be Asynchronous or Coincident RESET D17 D16 D15 D14 D13 D12 D11 Read and Write Operations Synchronized to

as 15-hg

Abstract: AS268 als268 ddto SN54ALS257 SN54ALS258 SN74 SN74AS257 SN74AS258 SN74ALS257
Contextual Info: SN74ALS257, SN74ALS258. SN74AS257, SN74AS258 SN54ALS257, SN54ALS258 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS D2661,APRIL 1 Three-State Outputs Interface Directly with

AHC138

Abstract: SN54AHC138 SN74AHC138
Contextual Info: SN54AHC138, SN74AHC138 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS S C L S 2 5 8 C - D E C E M B E R 1 9 9 5 - R E V IS E D J U L Y 1 9 9 6 Operating Range 2-V to 5.5-V V^c EPIC Enhanced-Performance Implanted CMOS Process Designed Specifically for High-Speed

Transistor BC 1078

Abstract: TSS400-S1 LCD tlc 771 TSS400CFN-S1 abe 630 K-Line L line BC 557 PNP TRANSISTOR circuits D4071 digital pressure sensor conditional circuit 44-PIN
Contextual Info: TSS400-S1 uPOWER PROGRAMMABLE HIGH-PRECISION SENSOR SIGNAL PROCESSOR SLMS001 -D 407 1, JANUARY 1993 * Onboard Ratiometric Current Source Programmable From 0.15 mA x SV^d/V to 2.4 mA x (SVDD/V) Two Independent Crystal Controlled Timers (32.768 kHz) Internal MOS Oscillator Serves as System

PASB

Abstract: ec ubt 4.8 t LVTH182502A LVTH18502A SN54LVTH182502A SN54LVTH18502A SN74LVTH182502A SN74LVTH18502A
Contextual Info: SN54LVTH18502A, SN54LVTH182502A, SN74LVTH18502A, SN74LVTH182502A 3.3-V ABT SCAN TEST DEVICES WITH 18-BIT UNIVERSAL BUS TRANSCEIVERS S C B S 6 6 8 A -JULY 1 9 9 6 - REVISED DECEMBER 1996 Members of the Texas Instruments SCOPE Family of Testability Products

HAI 7203

Abstract: ACT8847 74ACT8847 SN74 multiplier
Contextual Info: TEXAS INSTR LOGIC SSE D 0^1723 GQÖS7G3 7 SN74ACT8847 64-Bit Floating Point Unit • Meets IEEE Standard for Single- and DoublePrecision Formats • Performs Floating Point and Integer Add, Subtract, Multiply, Divide, Square Root, and Compare • 64-Bit IEEE Divide in 11 Cycles, 64-Bit Square

SDAS245A

Contextual Info: SN54ALS1245A, SN74ALS1245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDAS245A - DECEMBER 1982 - REVISED JANUARY 1995 Bidirectional Bus Transceivers in High-Density 20-Pin Packages SN54ALS1245A . . . J PACKAGE SN74ALS1245A. . . DW OR N PACKAGE TOP VIEW

Contextual Info: SN54ALS169B, SN54AS169A, SN74ALS169B, SN74AS169A SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS SDAS125B - MARCH 1984 - REVISED DECEMBER 1994 ►Fully Synchronous Operation for Counting and Programming * Internal Carry Look-Ahead Circuitry for Fast Counting * Carry Output for n-Bit Cascading

SN54ABTH182652A

Abstract: SN54ABTH18652A SN74ABTH182652A SN74ABTH18652A
Contextual Info: SN54ABTH18652A, SN54ABTH182652A, SN74ABTH18652A, SN74ABTH182652A SCAN TEST DEVICES WITH 18-BIT BUS TRANSCEIVERS AND REGISTERS _ SCBS167A-AUGUST 1 9 9 3 - REVISED AUGUST 1994 Members of the Texas Instruments SCOPE Family of Testability Products

Contextual Info: SN54ALVTH16841, SN74ALVTH16841 2.5-V/3.3-V 20-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS SCES077A - JULY 1996 - REVISED JULY 1996 Members of the Texas Instruments Widebus Family High-lmpedance State During Power Up and Power Down • • •

SN54ABT18245A

Abstract: SN74ABT18245A
Contextual Info: SN54ABT18245A, SN74ABT18245A SCAN TEST DEVICES WITH 18-BIT BUS TRANSCEIVERS SCBS11OE - AUGUST 1992 - REVISED JANUARY 1995 Members of the Texas Instruments SCOPE Family of Testability Products Members of the Texas Instruments Widebus™ Family SN54ABT18245A . . . WD PACKAGE

SN54LVT16646

Abstract: LVT16646 SN74LVT16646
Contextual Info: SN54LVT16646, SN74LVT16646 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS14 9 A - MAY 1992 - REVISED MARCH 1994 • State-of-the-Art Advanced BiCMOS Technology ABT Design for 3.3-V Operation and Low-Static Power Dissipation • Members of the Texas Instruments

74ACT16620

Contextual Info: 74ACT16620 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS184 - D3584. JUNE 1990 - REVISED APRIL 1993 Member of the Texas Instruments Wldebus Family Packaged in Plastic 300-mil Shrink Small-Outline Package Using 25-mll Center-to-Center Pin Spacings Inputs Are TTL-Voltage Compatible

sy 171

Abstract: SN54ALS832A SN54AS832B SN74ALS832A SN74AS832B
Contextual Info: SN74ALS832A, SN74AS832B, SN54ALS832A, SN54AS832B HEX 2-INPUT OR DRIVERS D2661, DECEMBER 1982 - REVISED SEPTEMBER 1990 • High Capacitive Drive Capability • 'ALS832A Has Typical Delay Time o f 4 .8 ns {C|. • 50 pF| and Typical Power Dissipation of 4 .5 mW per Gate

SN54ABT162501

Abstract: SN74ABT162501
Contextual Info: SN54ABT162501, SN74ABT162501 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS243B - SEPTEMBER 1992 - REVISED JULY 1994 B-Port Outputs Have Equivalent 25-£2 Series Resistors, So No External Resistors Are Required Members of the Texas Instruments

74ACT16475

Contextual Info: 74ACT16475 18-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS SCASI 98 —D3998, OCTOBER 1 9 9 0 -REVISED APRIL 1993 • Member of the Texas Instruments Widebus Family DL PACKAGE T O P V IE W ' Packaged In Plastic 300-mil Shrink Small-Outline Package Using 25-mil

Contextual Info: SN74ALS638A, SN74ALS639A, SN74AS638A, SN74AS639 OCTAL BUS TRANSCEIVERS SDAS123A-DECEM BER 1983 - REVISED JANUARY 1995 Bidirectional Bus Transceivers in High-Density 20-Pin Packages DW OR N PACKAGE TOP VIEW Choice of True or Inverting Logic D IR [ 1 A-Bus Outputs Are Open Collector;

Contextual Info: SN54ALS240A, SN54AS240A, SN74ALS240A, SN74AS240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SDAS214C - DECEMBER 1982 - REVISED AUGUST 1995 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers SN54ALS240A, SN54AS240A . . . J PACKAGE SN74ALS240A, SN74AS240A . . . DW OR N PACKAGE

Contextual Info: SN54ALS03B, SN74ALS03B QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS SDAS013B - MARCH 1984 - REVISED DECEMBER 1994 • Package Options Include Plastic Small-Outline D Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and

AHCT126

Abstract: SN54AHCT126 SN74AHCT126 m30 tf 125
Contextual Info: SN54AHCT126, SN74AHCT126 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCLS265C - DECEMBER 1995 - REVISED AUGUST 1996 • Inputs Are TTL-Voltage Compatible • EPIC Enhanced-Performance Implanted CMOS Process High Latch-Up Immunity Exceeds 250 mA Per JEDEC Standard JESD-17