0G057 Search Results

LC7930 pin

Abstract: sanyo LC7930 LC7930 8096 pin diagram lps 256
Contextual Info: SANYO m SEMICONDUCTOR u m CORP 25E D • TTTTOTb 0G05731 1 m T -i9 '¡9 -0 8 86212A, 86208A C M O S LSI 8-Bit Single Chip Microcomputer On-Chip LCD Controller/Driver, 16K-Byte ROM, 336-Byte RAM 3126 Overview The LC86216A, 86212A, 86208A microcomputers are 8-bit single chip m icrocofl^^

RJ41S

Abstract: design HF PSK modem 73D21b jack rj13 RJ41 73D22
Contextual Info: SILICON SYSTEMS INC 4bE 6253^5 D D0QS?m 1 • SIL SSI 73D2407 cw m s v à tn A TDK Group/Company MNP5 Controller and Modem Device Set s * Advance Information T " '- 7 5 ' 3 J ' Ÿ Ö D E S C R IP T IO N The SSI 73D2407 consists of four CMOS integrated circuits which together provide the data pump func­

Contextual Info: CS4215 S m a i* Semiconductor Corporation 16-Bit Multimedia Audio Codec Features General Description • Sample Frequencies from 4 kHz to 50 kHz [¡¡J w a v e The CS4215 is an Mwave audio codec. • 16-bit Linear, 8-bit Linear, ja-Law, or A-Law Audio Data Coding

AT40391B25

Abstract: 80386DX 16 BIT AMI 8042 AT40391B-40
Contextual Info: AT40391B/392 Features • Two-Chip PC/AT Compatible Chip Set for 80386DX Systems Operating up to 40 MHz AT40391B System and Cache Controller AT40392 Data Buffer Controller Two 160-Pln Quad Flatpacks On-Chip Support for Direct-Mapped Write-Back Cache 0 Walt State Cache Read Hit and Programmable 0/1 Wait State

Contextual Info: Tem ic 29C93A MATRA MHS ECMA102/V110 Terminal Rate Adaptor Circuit TRAC Description The 29C93A is a Terminal Rate Adaptor Circuit (TRAC) performing speed adaptation between synchronous/asynchronous V24 terminals through ISDN 64 kbps “B” channel. The TRAC can be connected to “B” channel using a

74LS393

Abstract: LC74HC393 PF227
Contextual Info: S AN Y O SEMICONDUCTOR CORP 1EE D I 7 c3ti 7 Ü 7 L j 000B7SS ^P45-ZS-i,3 LC74HC393 V - -1^ : ' -7V CMOS High-Speed Standard Logic LC74HC Senes 3003A Dual 4-Stage Binary Ripple Counter *2082A Features The LC74HC393 consists of 2 identical 4-bit binary ripple counters. Counting is sgcpmplished synchronously with

W9C 08

Abstract: marking W9C MT4C400
Contextual Info: SSE D MICRON TECHNOLOGY INC blllSMT □ 0 G S 7 M C1 3T7 M N R N MT4C4001J 883C 1 MEG X 4 DRAM IC Z R O N MILITARY DRAM 1 MEG X 4 DRAM FAST PAGE MODE PIN ASSIGNMENT Top View • SMD 5962-90847, Class M • JAN 5962-90847, Class B • MIL-STD-883, Class B

201 ferranti

Contextual Info: ZETEX S E M I C O N D U C T O R S TSD D ^70570 0005^5 4 • ZETB 950 05695 T - 3 =? - o ? Z V N 2535 N-channel enhancement mode vertical DMOS FET i FEATURES • Compact geometry • Fast switching speeds • No secondary breakdown • Excellent temperature stability

Contextual Info: July 1996 PRELIM INARY MgLMicro Linear ML4751 Adjustable Output Low Current Boost Regulator GENERAL DESCRIPTION FEATURES The ML4751 is a low power boost regulator designed for D C to DC conversion in 1 to 3 cell battery powered systems. The combination of internal synchronous

7 SEGMENT DISPLAY LT 543 PIN CONFIGURATION

Abstract: 7 segment display LT 542 PIN DIAGRAM OF 7 segment display LT 542 B988 7 SEGMENT DISPLAY LT 543 NJU6408B LT 543 7 segment display PIN DIAGRAM OF 7 segment display LT 543 LT 542 7 SEGMENT DISPLAY LT 543 PIN CONFIGURATION NJU6417C
Contextual Info: NJU6408B 8 — C H A R A C T E R 2 - L IN E D O T M A T R I X L C D CONTROLLER DRIVER WITH EXTENSION • GENERAL DESCRIPTION The NJU6408B is a Dot Matrix LCD controller driver for 8-character 2-line display with extension function up to 40-character 2-1ine display.

s33 sot23

Abstract: 05773
Contextual Info: PLESSEY SEMICOND/DISCRETE 7220533 PLESSEY ^ 5 S E M I C O N D /DI S C R E T E P-channel enhancement mode vertical DMOS FET d F |7 E E 0 S 3 3 95D ZVP1320 FEATURES • Compact geometry • Fast switching speeds • No secondary breakdown • Excellent temperature stability

Contextual Info: WAFER SCALE INT EGRATION bSE D • 00QSbS3 W Programmable Peripheral PSD4XX Family Field-Programmable Microcontroller Peripherals Preliminary Key Features □ Complete family of Field Programmable Microcontroller Peripherals enables the user to efficiently implement a highly

S5933QE

Abstract: Intel 8237 dma controller block diagram AMI eeprom bios amcc s5933 S593X ami bios EMB4 24C04 24C08 256X8
Contextual Info: A MCC ARCHITECTURAL OVERVIEW S5933 INTRODUCTION TO THE PCI LOCAL BUS FEATURES The local bus concept was developed to break the PC data bottleneck. Traditional PC bus architectures are inadequate to m eet the demands of today's graphics-oriented system s and large application

Contextual Info: Decem ber 1993 Edition 1.0 FUJITSU DATA S H E E T MB85380-60/-70/-80 CMOS 16M X 8 Fast Page Mode DRAM Module CMOS 16,777,216 x 8 Bit Fast Page Mode DRAM Module The Fujitsu MB85380 is a fully decoded CMOS D ynam ic Random Access Memory DRAM module consisting of eight MB8116100 devices.