09N0 Search Results

09N05

Contextual Info: SPD 09N05 SIPMOS Power Transistor Features Product Summary • N channel Drain source voltage VDS 55 V • Drain-Source on-state resistance RDS on 0.1 Ω Continuous drain current ID 9.2 A Enhancement mode • Avalanche rated • dv/dt rated • 175˚C operating temperature

12010832

Contextual Info: THIS DRAWING AND DESIGN HEREON CON­ STITUTES A PROPRIETARY DESIGN OF PACKARD ELECTRIC D IVISIO N AND IS NO TO BE DUPLICATED OR REPRODUCED WITH OUT AUTHORITY OF PACKARD ELECTRIC D IVISIO N . DATE SYM 09N090 Al AUTHORITY DR REVISION RECORD CK REDRAWN WITH NO PHYSICAL CHANGE ADDED INDEX CODE AND NOTE 5 AND

Contextual Info: DO NOT SCALE 12.5 REF DATE SYM 28JA92 A RELEASED 920005 GC GC 17JN92 B ADVANCED REV LEVEL 149259 T5 31AU95 09N095 1.50 AUTHORITY REVISION RECORD B1 REVISED M A T ! C REVISED DR CK TS 167560 GLH GLH 168408 GLH GLH 1.50 - 1 a G a a ° T d o I— I CO 1- 1 Q

Contextual Info: 3 6 THIS O DRAWI NG COPYRIGHT 15 UNPUBLISHED. RELEASED 19 BY A MP I NCORP ORATE D. ALL FOR PUBLICATION RIGHTS LOC REVISIONS DIST RESERVED. LTR DESCRIPTION BAND REL -1 THRU REV PER -16 0520-1694-04 DATE DWN APVD 12 JU L0 4 TS CA 09N0V04 TS CA 5 n Lt-4 1 i-M-1

Contextual Info: O DATE 0s SYM REVISION RECORD AUTH DR CK 24SE92 - REDRAWN AND UPDATED TO LATEST STANDARDS REV LEVEL REMAINS 24FE93 REDRAWN AND REVISED REV LEVEL REMAINS > H o z o 1— C\J tr • Q< _ '— 1 07AP93 > H 09N094 1.50 REF 164566 JVM SMP 171061 JGS JGS Ò 2. 60 DIA

Contextual Info: THIS DRAWING AND DESIGN HEREON CON­ STITUTES A PROPRIETARY DESIGN OF PACKARD ELECTRIC DIVISION AND IS NO TO BE OUPUCATEO OR REPRODUCED WITH OUT AUTHORITY OF PACKARD ELECTRIC DIVISION. SYM DATE cp — AUTHORITY OR CK 09N09Ö E2 REDRAWN, REVISED NOTES, REMOVED

09n05

Abstract: SPD09N05 P-TO252 Q67040-S4130-A2 Q67040-S4136 SPU09N05
Contextual Info: SPD 09N05 SIPMOS Power Transistor Features Product Summary • N channel Drain source voltage VDS 55 V • Drain-Source on-state resistance RDS on 0.1 Ω Continuous drain current ID 9.2 A Enhancement mode • Avalanche rated • dv/dt rated • 175˚C operating temperature

09N03

Abstract: PJD09N03
Contextual Info: 09N03 25V N-Channel Enhancement Mode MOSFET TO-252 FEATURES • RDS ON , VGS@10V,IDS@30A=9mΩ • RDS(ON), VGS@4.5V,IDS@30A=12mΩ • Advanced trench process technology • High Density Cell Design For Uitra Low On-Resistance • Specially Designed for DC/DC Converters and Motor Drivers

communication optomux

Abstract: ELPAC ODC5 opto22 rtd signal processor AC30 B3000 arcnet 11Z6 b2 brain board ELPAC POWER SYSTEMS
Contextual Info: OPTOMUX PROTOCOL USER’S GUIDE Form 203-020107 — January, 2002 43044 Business Park Drive, Temecula, CA 92590-3614 Phone: 800/321-OPTO 6786 or 951/695-3000 Fax: 800/832-OPTO (6786) or 951/695-2712 Internet Web site: www.opto22.com Product Support Services:

09n03lb

Abstract: 09N03 09N03L TRANSISTOR SMD MARKING CODE 42 IPD09N03LB PG-TO252-3-11 IPD09N03LBG
Contextual Info: OptiMOS 2 Power-Transistor 09N03LB G 09N03LB G 09N03LB G 09N03LB G Product Summary Features • Ideal for high-frequency dc/dc converters • Qualified according to JEDEC1 for target applications V DS 30 V R DS on),max 9.1 mΩ ID 50 A • N-channel, logic level

C3521

Abstract: LUBRICANT amp
Contextual Info: DO DIMENSIONS -37, 9- r 4,0- 79 -Ny TMiPD AK/ß/ P M IN mm E T R I C PROJECTION -VJ NOTES: PLATING CONNECTOR: A S E C T I O N A-A •9x4, 0 —3 6 , 0 •0,95 M A X NOT S C A L E CONTACT AREA: 0,8pm Au M I N . OVER 1,3pm Ni MIN. ACT ION— PIN AREA

Contextual Info: Preliminary data 09N03LA 09N03LA,09N03LA OptiMOSâ 2 Power-Transistor Product Summary Feature Ideal for high-frequency dc/dc converters  N-Channel  Logic Level  Excellent Gate Charge x RDS on product (FOM)  Very low on-resistance RDS(on) P- TO262 -3-1

Contextual Info: 3 DRAWING MADE THIS IN THIRD DRAWING ANGLE IS PROJECTION UNPUBLISHED. COPYRIGHT RELEASED 19 BY AMP FUR LOO P U B L I G A T I ON IN CO RPO RATED. ALL INTERNATIONAL RIGHTS D I ST REV I 5 IONS RESERVED. ZONE LTR D E S C R I P T I ON REVISED PER EC DATE -Q5

09n03la

Abstract: IPB09N03LA 09N03 IPI09N03LA IPP09N03LA Q67042-S4151
Contextual Info: 09N03LA 09N03LA, 09N03LA OptiMOS 2 Power-Transistor Product Summary Features • Ideal for high-frequency dc/dc converters • N-channel V DS 25 V R DS on ,max (SMD version) 8.9 mΩ ID 50 A • Logic level • Excellent gate charge x R DS(on) product (FOM)

09N03

Abstract: PJ09N03D 09n03d
Contextual Info: 09N03D 25V N-Channel Enhancement Mode MOSFET FEATURES • RDS ON , VGS@10V,IDS@30A=9mΩ • RDS(ON), VGS@4.5V,IDS@30A=16mΩ • Advanced Trench Process Technology • High Density Cell Design For Ultra Low On-Resistance • Specially Designed for DC/DC Converters and Motor Drivers

12040707

Abstract: 12040709 12040706
Contextual Info: 7 THIS DRAWING AND DESIGN HEREON CON­ STITUTES A PROPRIETARY DESIGN OF PACKARD ELECTRIC DIVISION AND IS NOT TO BE DUPLICATED OR REPRODUCED WITH­ OUT AUTHORITY OF PACKARD ELECTRIC DIVISION. DO NOT SC A L E DATE 1° 0 0 7 c> DRAFT 1°30 P R A F T H 05FE91

Contextual Info: DO NOT SCALE D TYPE 102 SAM E ASASTYPE EXCEPT SHOW101 N r ri in 20.6 REF 1 4.75 REF > . _.z 1 1o O P< tr £o ._. tr« M oi cr 00 1 on - I trz OPS LU S< ha /— \ t 4-1 4 14.00 TYP -2 PLCS 1 UJi LU Q 0 5 cr 5.00 13.70 13.70 < o < CL TYPE l2l9l667 A IOI R0071754 PA66 HS IM BLK

Contextual Info: 19 20 18 17 16 i 15 14 13 12 10 1 1 9 7 6 5 ï 4 3 M ISS IN G SYMBOL D E F I N I T I O N A DIMENSION WITHOUT AN INSPECTION REPORT SYMBOL DOES NOT REQUIRE INSPECTION. IT MAY BE CONTROLLED ON THE INDIVIDUAL COMPONENT DRAWING. TOTAL NO OF INSPECTIONS REQUIRED

Contextual Info: THIS DRAWING AND DESIGN HEREON CON­ STITUTES A PROPRIETARY DESIGN OF PACKARD ELECTRIC DIVISION AND IS NOT TO BE DUPLICATED OR REPRODUCED WITH OUT AUTHORITY OF PACKARD ELECTRIC DIVISION. DATE 15AU95 FOR WING ENHANCEMENT F E A T U R E S SUCH AS N O T C H E S , K N U R L S OR S E R R A T I O N S , S E E D E T A I L

ADF1204

Abstract: ADF12T04 ADF0404 ADF10T04 1-1825002-1
Contextual Info: 4 T H IS D R A W IN G IS U N P U B L IS H E D . 3 R ELEASED FOR P U B L IC A T IO N ALL C O P Y R IG H T BY TYCO E L E C T R O N IC S R IG H T S RESERVED. C O R P O R A T IO N . D C H TT7T .152 .063 +.000 - .0 0 8 ' .024 .010 TYP + .000 - .0 0 4 TYP .100 TYP

09n03la

Abstract: IPB09N09LA IPP09N03LA 09n03 Q67042-S4152 Q67042-S4153 09n03l
Contextual Info: Preliminary data 09N03LA 09N03LA,09N09LA OptiMOSâ 2 Power-Transistor Product Summary Feature Ideal for high-frequency dc/dc converters  N-Channel  Logic Level  Excellent Gate Charge x RDS on product (FOM)  Very low on-resistance RDS(on) P- TO262 -3-1

09N03

Abstract: DS9256 RT9256 SS0520 09N03LT
Contextual Info: RT9256 Preliminary Actively Alternative Mode Two-Phase / Dual Switching PWM Controller General Description Features The RT9256 is an analogous current mode design and is specifically promoted for high power density consideration platform with MLCC capacitor attached, such as high-end

mosfet 09n03la

Abstract: mosfet 06N03LA 2N3904 M5 09N03LA C3312 13n03la 06n03la D1N4148 m7 MOSFET SC2677BEVB-1
Contextual Info: SC2677B Dual Synchronous Voltage Mode Controller with Current Sharing Circuitry POWER MANAGEMENT Description Features The SC2677B is a versatile 2 phase, synchronous, voltage mode PWM controller that can be used in two distinct ways. First, the SC2677B is ideal for applications

12040559

Contextual Info: DATE 12 .5 R E F 07DE89 B RELEASED 15FE90 C GRAPHICS REVISED; M AT1 SPEC WAS NYLON 66 - YELLOW 06AP90 - ADDED "YELLOW" TO MAT' SPEC. 31MY90 D MAT! SPEC. WAS l.M. POLYEST YELLOW 02AU90 - ADDED CODE NO. 6900 20DE90 E GRAPHICS REVISED 11N091 F GRAPHICS REVISED