09JUL2 Search Results

Contextual Info: 7 8 THIS DRAWING IS UNPUBLISHED. C COPYRIGHT 20 RELEASED FOR PUBLICATION BY - 6 5 4 3 2 20 LOC AD ALL RIGHTS RESERVED. 1 REVISIONS DIST 00 P LTR H 1.2 TAIL LENGTH 13.3 3.80 12.7 DESCRIPTION DATE REVISED PER ECO-12-020314 DWN KH 09JUL2013 1 MATERIAL: HOUSING: LCP, GLASS FILLED, UL94V-0.

PLC siemens LOGO

Contextual Info: 4 RELEASED FOR PUBLICATION THIS DRAWING IS UNPUBLISHED. C COPYRIGHT 1 2011 LOC REVISIONS DIST GP ALL RIGHTS RESERVED. - 2011 2 3 00 P LTR B C H DESCRIPTION DATE DWN APVD REDRAWN PER ECO-12-008266 27AUG2012 CJV CWR REVISED PER ECO-13-007439 09JUL2013 CJV CWR

Contextual Info: 107-68948 Packaging Specification 09Jul2012 Rev C CABLE ASSEMBLY,DIRECT ATTACH QSFP 1. PURPOSE 目的 Define the packaging specifiction and packaging method of CABLE ASSEMBLY,DIRECT ATTACH QSFP. 订定 CABLE ASSEMBLY,DIRECT ATTACH QSFP 产品之包装规格及包装方式。

Contextual Info: 7 8 THIS DRAWING IS UNPUBLISHED. C COPYRIGHT 20 RELEASED FOR PUBLICATION 6 5 4 3 2 20 LOC AD ALL RIGHTS RESERVED. BY - 1 REVISIONS DIST 00 P LTR E3 13.3 1.2 TAIL LENGTH 12.7 3.80 DESCRIPTION DATE REVISED PER ECO-12-020314 DWN KH 09JUL2013 1 MATERIAL: HOUSING: LCP, GLASS FILLED, UL94V-0.

Contextual Info: THIS DRAWING IS A CONTROLLED DOCUMENT. LOC REVISIONS DIST HJ - P LTR DESCRIPTION B3 B4 B5 C DWN DATE Printing New HF3 46E ECR-12-003906, New HF3 43I S REVISED PER ECO-13-009645 HD BK AK AK UKo UKo UKo UKo 09JUL2010 12JAN2012 29FEB2012 18JUN2013 APVD Mark 1)

Contextual Info: THIS DRAWING IS A CONTROLLED DOCUMENT. LOC REVISIONS DIST HJ - P LTR B1 B2 B3 C DESCRIPTION DWN DATE New HF3 51S, HF3 56S, HF3 91S Printing , new HF3 53RS New HF3 91R, HF3 93R, HF3 96R REVISED PER ECO-13-009645 HD HD BK AK UKo UKo UKo UKo 06APR2010 09JUL2010

Contextual Info: 4 RELEASED FOR PUBLICATION THIS DRAWING IS UNPUBLISHED. C COPYRIGHT 1 2011 LOC REVISIONS DIST GP ALL RIGHTS RESERVED. - 2011 2 3 00 P LTR B C H -0.51 DESCRIPTION DATE DWN APVD REDRAWN PER ECO-12-008266 27AUG2012 CJV CWR REVISED PER ECO-13-007439 09JUL2013

c8051f360

Abstract: C8051F361
Contextual Info: Process Change Notice #0707091 PCN Date: 09Jul2007 Effective Date: 17Oct07 Title: C8051F360/1/2/3/4 revision B manufacturability and performance enhancements

Contextual Info: 7 8 THIS DRAWING IS UNPUBLISHED. C COPYRIGHT 20 RELEASED FOR PUBLICATION 6 5 4 3 2 20 LOC AD ALL RIGHTS RESERVED. - 1 REVISIONS DIST 00 P LTR E DESCRIPTION DATE REVISED PER ECO-12-020314 DWN APVD KH 09JUL2013 DD 18.9 17.10 1 MATERIAL: HOUSING: LCP, GLASS FILLED, UL94V-0.

T2006

Contextual Info: D R A W IN G IS U N P U B L IS H E D . R ELEASED FO R A LL P U B L IC A T IO N LOC D IS T R IG H TS Hr 00 RESERVED. C O P Y R IG H T REVISIO N S DWN A PVD JM JG D E S C R IP T IO N REV PER 09JUL2012 E C O —1 2 —0 1 2 9 ' DIMENSIONS ARE MAXIMUM O TH ER W ISE SPECIEIED .

Contextual Info: T H IS D R A W IN G IS U N P U B L IS H E D . R ELEASED FO R A LL P U B L IC A T IO N R IG H TS RESERVED. C O P Y R IG H T LOC D IS T HÏ 00 REVISIO N S D E S C R IP T IO N REV PER 09JUL2012 E C O —1 2 —0 1 2 9 ' A DIMENSIONS ARE MAXIMUM S P E C IF IE D .

Contextual Info: THIS DRAWING IS UNPUBLISHED. i^ \ COPYRIGHT - RELEASED FOR PUBLICATION ALL RIGHTS RESERVED. BY TYCO ELECTRONICS CORPORATION. REVISIONS LOC DIST CM 00 P LTR G DESCRIPTION DATE EC 0G3B 1035 04 DWN 18MAYO5 APVD BSV DPB CL n < C\i 0.48+0.08 [.01 9+ .003] 3.1 8±0.05

Contextual Info: STL9N3LLH5 N-channel 30 V, 0.015 Ω, 9 A, PowerFLAT 3.3x3.3 STripFET™ V Power MOSFET Features Type VDSS RDS(on) max ID STL9N3LLH5 30 V < 0.019 Ω 9 A (1) 1. The value is rated according Rthj-pcb • RDS(on) * Qg industry benchmark ■ Extremely low on-resistance RDS(on)

Contextual Info: RF Signal Relays AXICOM HF3 Relay n Y-Design n Frequency range DC to 3GHz n Impedance 50Ω or 75Ω n Small dimensions 14.6x7.2x10mm n 1 form C contact (1 changeover contact) n Immersion cleanable n Low power consumption (≤140mW) Typical applications Cable modems and linecards/ CATV, Tabs, measurement and test

BIOS Flash ROM Chip

Abstract: M50FW040 PLCC32 TSOP32
Contextual Info: M50FW040 4-Mbit 512 Kb x8, uniform block 3-V supply firmware hub Flash memory Feature summary • Supply voltage – VCC = 3 V to 3.6 V for Program, Erase and Read operations – VPP = 12V for fast Erase (optional) ■ Two interfaces – Firmware hub (FWH) interface for

M27W032

Contextual Info: M27W032 32 Mbit 2Mb x16 3V Supply FlexibleROM Memory FEATURES SUMMARY • ONE TIME PROGRAMMABLE ■ Figure 1. Packages SUPPLY VOLTAGE – VCC = 2.7 to 3.6V for Read – VPP = 11.4 to 12.6V for Program ■ ACCESS TIME ■ – 90ns at VCC = 3.0 to 3.6V

Contextual Info: SM1060DS1 VOLTAGE 60 V 10Amp. Schottky Barrier Rectifiers Elektronische Bauelemente RoHS Compliant Product A suffix of “-C” specifies halogen & lead-free TO-252 D-PACK FEATURES z z z z z Low forward voltage drop High current capability High reliability

Contextual Info: VN808CM-E Octal channel high-side driver Datasheet - production data • Protection against loss of ground • Very low standby current • Compliance to 61000-4-4 IEC test up to 4 kV Description PowerSO-36 Features Type RDS on IOUT VCC VN808CM-E 160 mΩ

Contextual Info: STGIPS20C60 SLLIMM small low-loss intelligent molded module IPM, 3-phase inverter - 20 A, 600 V short-circuit rugged IGBT Datasheet - production data Applications • 3-phase inverters for motor drives • Air conditioners Description This intelligent power module provides a

Contextual Info: M27W032 32 Mbit 2Mb x16 3V Supply FlexibleROM Memory PRELIMINARY DATA FEATURES SUMMARY • ONE TIME PROGRAMMABLE ■ Figure 1. Packages SUPPLY VOLTAGE – VCC = 2.7 to 3.6V for Read – VPP = 11.4 to 12.6V for Program ■ ACCESS TIME ■ – 90ns at VCC = 3.0 to 3.6V

Contextual Info: M27W032 32 Mbit 2Mb x16 3V Supply FlexibleROM Memory PRELIMINARY DATA FEATURES SUMMARY • ONE TIME PROGRAMMABLE ■ Figure 1. Packages SUPPLY VOLTAGE – VCC = 2.7 to 3.6V for Read – VPP = 11.4 to 12.6V for Program ■ ACCESS TIME ■ – 90ns at VCC = 3.0 to 3.6V

DS1220

Abstract: M48Z02 M48Z12 24-Pin Plastic DIP
Contextual Info: M48Z02 M48Z12 5 V, 16 Kbit 2 Kb x 8 ZEROPOWER SRAM Features • Integrated, ultra low power SRAM and powerfail control circuit ■ Unlimited WRITE cycles ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection

L78L00

Abstract: LE12AB LE12C LE15AB LE15C LE25AB LE25C LE27AB ap 4606
Contextual Info: LE00AB/C SERIES VERY LOW DROP VOLTAGE REGULATORS WITH INHIBIT • ■ ■ ■ ■ ■ ■ ■ ■ VERY LOW DROPOUT VOLTAGE 0.2V TYP VERY LOW QUIESCENT CURRENT (TYP. 50 µA IN OFF MODE, 0.5 mA IN ON MODE, NO LOAD) OUTPUT CURRENT UP TO 100 mA OUTPUT VOLTAGES OF 1.25; 1.5; 2.5; 3;

54VCXH162373

Abstract: RHFXH162373K-01V RHRXH162373K-01V RHRXH162373K-02V
Contextual Info: 54VCXH162373 Rad hard low voltage CMOS 16-bit D-type latch 3-state with 3.6V tolerant inputs and outputs Features • 1.65 to 3.6V inputs and outputs ■ High speed: – tPD = 3.3ns (Max) at VCC = 3.0 to 3.6V – tPD = 4.5ns (Max) at VCC = 2.3 to 2.7V ■