09005AEF80C97015 Search Results

Contextual Info: ADVANCE‡ 128Mb: x16 MOBILE SDRAM SYNCHRONOUS DRAM MT48H8M16LF - 2 MEG x 16 x 4 BANKS Features Figure 1: 54-Ball FBGA Pin Assignment Top View • Temperature compensated self refresh (TCSR) • Fully synchronous; all signals registered on positive edge of system clock

Contextual Info: PRELIMINARY‡ 128Mb: x16 MOBILE SDRAM SYNCHRONOUS DRAM MT48H8M16LF - 2 MEG x 16 x 4 BANKS Features Figure 1: 54-Ball FBGA Pin Assignment Top View • Temperature compensated self refresh (TCSR) • Fully synchronous; all signals registered on positive edge of system clock

MT48H8M16LFF4-8IT

Abstract: MT48H8M16 A11 MARKING CODE 8M16 MT48H8M16LF MT48H8M16LFF4
Contextual Info: 128Mb: x16 – Mobile SDRAM Features Synchronous DRAM MT48H8M16LF - 2 Meg x 16 x 4 banks Features Figure 1: 54-Ball FBGA Assignment Top View • Temperature compensated self refresh (TCSR) • Fully synchronous; all signals registered on positive edge of system clock

MT48H8M16LFF4-8

Abstract: MT48H8M16LFF4
Contextual Info: ADVANCE‡ 128Mb: x16 MOBILE SDRAM SYNCHRONOUS DRAM MT48H8M16LF - 2 MEG x 16 x 4 BANKS Features Figure 1: 54-Ball FBGA Pin Assignment Top View • Temperature compensated self refresh (TCSR) • Fully synchronous; all signals registered on positive edge of system clock

Contextual Info: 128Mb: x16 MOBILE SDRAM SYNCHRONOUS DRAM MT48H8M16LF - 2 MEG x 16 x 4 BANKS Features Figure 1: 54-Ball FBGA Pin Assignment Top View • Temperature compensated self refresh (TCSR) • Fully synchronous; all signals registered on positive edge of system clock