07NOV2001 Search Results

Contextual Info: TH I S DRAW I NG IS UNPUBLI S HE D. RELEASED BY C O P Y RI G HT 20 TYCO ELECTRONICS F OR CORPORATION. ALL PUBLICATION R 1G H T S 20 L OC RESERVED. D I ST PT R E V LTR I S I O N S DESCRIPTION DATE DWN APVD RELEASED R E V I S E D PER 0 G 3 B - 0 I 19- 01 12NOV2Û Û I

Contextual Info: TH I S DRAW ING IS UNPUBLI SHED. C O P Y R I G HT 2 0 RELEASED BY TYCO ELECTRONICS FOR CORPORATION. ALL PUBLICATION R 1G H T S 20 LOC PT RESERVED. REV I S IONS D I ST LTR DESCRIPTION DATE DWN APVD RELEASED REVISED PER 0 G 3 B - 0 I 19-01 12 N O V 2 Û Û I

M48T129V

Abstract: M48T129Y
Contextual Info: M48T129Y M48T129V 5.0 or 3.3 V, 1 Mbit 128 Kbit x 8 TIMEKEEPER SRAM Features • Integrated, ultra low power SRAM, real-time clock, power-fail control circuit, battery, and crystal ■ BCD coded century, year, month, day, date, hours, minutes, and seconds

Contextual Info: M68AR024D 16 Mbit 1M x16 1.8V Asynchronous SRAM OBSOLETE PRODUCT FEATURES SUMMARY • ■ ■ ■ ■ ■ ■ ■ ■ SUPPLY VOLTAGE: 1.65 to 1.95V I/O SUPPLY VOLTAGE: 1.5 to 1.95V 1M WORDS x 16 bits LOW POWER SRAM EQUAL CYCLE and ACCESS TIME: 70ns LOW VCC DATA RETENTION: 1.0V

AN1471

Abstract: M24XXX
Contextual Info: AN1471 Application note What happens to the M24xxx I²C EEPROM if the I²C bus communication is stopped? This Application note describes what can be attempted to set an M24xxx memory back to a known state if it has been suddenly stopped before completion of the current I²C instruction.

Contextual Info: M48Z128 M48Z128Y 5.0 V, 1 Mbit 128 Kbit x 8 ZEROPOWER SRAM Not recommended for new design Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; unlimited WRITE cycles ■ 10 years of data retention in the absence of

Contextual Info: M68AR024D 16 Mbit 1M x16 1.8V Asynchronous SRAM OBSOLETE PRODUCT FEATURES SUMMARY • ■ ■ ■ ■ ■ ■ ■ ■ SUPPLY VOLTAGE: 1.65 to 1.95V I/O SUPPLY VOLTAGE: 1.5 to 1.95V 1M WORDS x 16 bits LOW POWER SRAM EQUAL CYCLE and ACCESS TIME: 70ns LOW VCC DATA RETENTION: 1.0V

M48T129Y

Abstract: STMicroelectronics
Contextual Info: M48T129Y M48T129V 5.0 or 3.3 V, 1 Mbit 128 Kbit x 8 TIMEKEEPER SRAM Not recommended for new design Features • Integrated, ultra low power SRAM, real-time clock, power-fail control circuit, battery, and crystal ■ BCD coded century, year, month, day, date,

Contextual Info: M48Z128 M48Z128Y 5.0 V, 1 Mbit 128 Kbit x 8 ZEROPOWER SRAM Not recommended for new design Features • Integrated, ultra low power SRAM, power-fail control circuit, and battery ■ Conventional SRAM operation; unlimited WRITE cycles ■ 10 years of data retention in the absence of

AN1471

Abstract: ic eeprom conclusion of can bus application in automotive n
Contextual Info: AN1471 Application note What happens to the M24xxx I²C EEPROM if the I²C bus communication is stopped? This application note describes what can be attempted to set an M24xxx memory back to a known state if it has been suddenly stopped before completion of the current I²C instruction.

Contextual Info: M48T129Y M48T129V 5.0 or 3.3 V, 1 Mbit 128 Kbit x 8 TIMEKEEPER SRAM Not recommended for new design Features • Integrated, ultra low power SRAM, real-time clock, power-fail control circuit, battery, and crystal ■ BCD coded century, year, month, day, date,

M68AR024D

Abstract: TFBGA48
Contextual Info: M68AR024D 16 Mbit 1M x16 1.8V Asynchronous SRAM PRELIMINARY DATA FEATURES SUMMARY • SUPPLY VOLTAGE: 1.65 to 1.95V ■ I/O SUPPLY VOLTAGE: 1.5 to 1.95V ■ 1M WORDS x 16 bits LOW POWER SRAM ■ EQUAL CYCLE and ACCESS TIME: 70ns ■ ■ LOW VCC DATA RETENTION: 1.0V

E60677

Contextual Info: TH I S DRAW ING IS UNPUBLI S H E D . RELEASED BY C OP Y R I G H T 2 0 TYCO ELECTRONICS CORPORATION F OR ALL 20 P U B L I C A T I ON R I GHTS L OC RESERVED. REV I S I O N S D I ST FT DESCRIPTION C5 M A T E R I A L S AND F I N I S H H O U S I N G : PA 6 - 6 , UL 9 4 - V O , COLOR - SEE T A B L E .

AN1471

Abstract: ic eeprom
Contextual Info: AN1471 APPLICATION NOTE What Happens to the M24xxx I²C EEPROM If the I²C Bus Communication is Stopped? This document describes what can be attempted to set an M24xxx device back to a known state if it has been suddenly stopped before completion of the current I²C instruction, for example due to a power failure