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SN74LVC821 Abstract: 10D13 Contextual Info: SN74LVC821 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS S CAS304 - MARCH 1993 - REVISED MARCH 1994 EPIC Enhanced-Performance Implanted CMOS Submicron Process DB, DW, OR PW PACKAGE (TOP VIEW) Typical V q l p (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C	OCR Scan	SN74LVC821 10-BIT 010054b 10D13	PDF

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SN74LVC821

Abstract: 10D13
Contextual Info: SN74LVC821 10-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS S CAS304 - MARCH 1993 - REVISED MARCH 1994 EPIC Enhanced-Performance Implanted CMOS Submicron Process DB, DW, OR PW PACKAGE (TOP VIEW) Typical V q l p (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C

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SN74LVC821 10-BIT 010054b 10D13

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