000404B Search Results

Contextual Info: F eatures □ Comprehensive M IL-STD-1553 dual redundant Bus Controller BC , Remote Terminal (RT), and Monitor Terminal (MT) with integrated Bus Transceivers, Memory, and Memory Management Unit (MMU) □ Compliant MIL-STD-1553B, Notice II RT - Internal command ¡¡legalization in the RT mode

Contextual Info: IBM11S2325HP IBM11S4325HP IBM11S2325HM IBM11S4325HM 2M/4M x 32 SO DIMM Module Features • 72-Pin Small Outline Dual-In-Line Memory Module • Performance: -60 -6R -70 I rAC RAS A ccess T im e ; 60ns j 60ns 70ns fcAC CAS Access Tim e i 15ns [ 17ns 20ns AA Access Tim e From Address

Contextual Info: LM A1009/2009 12 x 12-bit M ultiplier-Accum ulator DEVICES INCORPORATED 1 FEATURES | DESCRIPTION □ 20 ns Multiply-Accumulate Time □ DECC SMD No. 5962-90996 The LMA1009 and LMA2009 are high­ speed, low power 12-bit multiplieraccumulators. They are pin-for-pin

Contextual Info: TUNDRA CA82C55A PROGRAMMABLE PERIPHERAL INTERFACE • Pin and functional compatibility with the industry standard 8255A • Supports 8086/8088 and 80186/188 microprocessors • Very high speed - 1 0 , 8 and 5 MHz zero wait state operation • Low power CMOS Implementation

101F

Abstract: ACY23 ACY23V ACY32 ACY32V Q60103-Y23-E Q60103-Y23-F Q60103-Y32-E Q60103-Y32-F Q62901-B1
Contextual Info: 2SC D • 023SbOS 0004041 4 PNP Transistors for AF Input Stages SIEMENS AKTIENGESELLSCHAF ISIE6 1 5C 04041 D ACY23 ACY32 ACY 23 and ACY 32 are alloyed germanium PNP transistors in 1 A 3 DIN 41871 case similar to T0-1 . All leads are electrically insulated from the case. The collector terminal

TCA 365

Abstract: PCM30 PDH system 178 08T Bipolar IC For Switching Power Supply Contro c22e LOF atm PMC saturn 78P7200 PCM30 PM4341 PM6341
Contextual Info: S tandardProduct I I / IV — PMC-Sierra, Inc. ISSUE 5 PM7345 S/UNI-PDH SATURN User Network Interface forPDH FEATURES Implements the ATM Direct Cell Mapping into DS1, DS3, E1, E3 transmission systems according to ITU-T Draft Recommendation G.804. Implements the Physical Layer Convergence Protocol PLCP for DS1 and DS3

EPF8282

Contextual Info: FLE X 8000 Includes FLEX 8000A • OUUU Programmable Logic Device Family March 1995, ver. 6 Features. Data Sheet ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Low-cost, high-density, register-rich CMOS programmable logic device family 2,500 to 16,000 usable gates

epf8050M

Contextual Info: EPF8050M FLEX 8000M Programmable Logic Device March 1995, ver. 3 Features D a tasheet • Prelim inary Information ■ ■ ■ Architecture Description The Altera EPF8050M device combines four EPF81188 devices and one Field Programmable Interconnect FPIC device to create a 50,000-gate

Contextual Info: S TANDARD PRODUCT PM PM C -Sierra, Inc. ISSUES PM7345 S/UNI-PDH SATURN User Network Interface forPDH FEA T URES • Implements the ATM Direct Cell Mapping into DS1, DS3, E1, E3 transmission systems according to ITU-T Draft Recommendation G.804. • Implements the Physical Layer Convergence Protocol PLCP for DS1 and DS3