000400B Search Results

Contextual Info: G A L 1 6 V 8 iilL a ttice • High Performance E2CMOS PLD Generic Array Logic Semiconductor Corporation FUNCTIONAL BLOCK DIAGRAM FEATURES • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 5 ns Maximum Propagation Delay — Fmax = 166 MHz — 4 ns Maximum from Clock Input to Data Output

s914

Contextual Info: Integrated Circuit Systems, Inc. ICS9148-08 Frequency Generator & Integrated Buffers for PENTIUM/Pro General Description Features The IC S 9 148-08 generates all clocks required for high speed RISC or CISC microprocessor systems such as Intel PentiumPro or Cyrix. Eight different reference frequency

23C8001

Abstract: 02c15 GM23C8001
Contextual Info: ¿fe GM23C8001 GoldStar 1,048,576 WORDSx 8 BIT CMOS MASK ROM GOLDSTAR ELECTRON CO., LTD. Description Pin Configuration The G M 23C8001 high performance Read Only Memory is organized as 1,048,576 words by 8 bits and has an access tim e of 120ns. It needs no

xxnx

Abstract: JRC 5002 yamaha 68000
Contextual Info: YAMAHA'L S I YM7405B IDNDCH ISDN basic access interface with D channel packet • GENERAL DESCRIPTION The YM7405B is an upgraded version of the YM7405 chip with the ISDN user-network interface function digital four-wire time-division full-duplex operation .

Contextual Info: -HYUNDAI HYC532200 Series 2Mx32 DRAM CARD DESCRIPTION The HYC532200 is the DRAM memory card consisting of sixteen HY514400ALT built in the metal plate housing. The Hyundai DRAM card is optimized forthe applications such as buffering, main and add-in memory in the portable

UC5613

Contextual Info: LIN Doc #: 5213 M I I T h e I n f i n i t e K i I I ; { P o w e r ! K ) \ I 9 - L ine L ow C apacitance , [j P ow er SC SI T erminator I n n o v a t i o n o f P D r o d u c t i o n DESCRIPTION KEY PRODUCT • 60|j A SUPPIY CURRENT IN DISCON­ NECT MODE ■ 600mA SUPPLY CURRENT DURING

OZ890

Contextual Info: r BU9500K o m m m IC /IC s for OA Applications ROHM CO LTD 40E ,!# • ^ i D 7 f l 2 f i ci cì c] FD D J£=1> h d - - 7 0 0 0 4 0 h 4 □ E 3 R H Ì1 T-Z2-2Z-C.I FD D Controller • W K 'tfjill./D im en sio n Unit mm BU 9500K(i, 5 V m - 1 T 'li) iio lH g 4 'F D D ff lz i> h P 7 l C T 't o

ECG280

Abstract: ECG1121
Contextual Info: P H IL IP S E C G IN C 17E bbSBTSÛ 0004005 S T-77-07-09 ECG1121 TV COLOR SYNC. CIRCUIT sem iconductors FUNCTIONS • • • • • • 3 .58MHz Ose. Phase Det. K iller Det. K iller Amp. B urst G ate Pulse Tint Control PIN ARRANGEMENT Pin No Function 1 Bias Output

62011

Abstract: EL1881C EL1881CN EL1881CS LM1881 QCX0002
Contextual Info: F ea tu res • N TSC , PA L, SECA M , non­ standard video sync separation • Fixed 70 mV slicing of video in p u t levels from 0.5 V p.p to 2 V p.p • Low supply curren t - 1.5 m A typ. • Single + 5V supply • Com posite, vertical sync o u tp u t • O d d /E v en field o u tp u t

6c41

Abstract: S2184 NIOS16 139706 app abstract APEX nios development board
Contextual Info: Nios Embedded Processor Software Development Reference Manual 101 Innovation Drive San Jose, CA 95134 408 544-7000 http://www.altera.com MNL-NIOSPROG-2.1 Document Version: Document Date: 2.1 04/02 Copyright Nios Software Development Reference Manual Copyright 2002 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo,

auo 014

Contextual Info: GM71C4260A/AL GM71CS4260A/AL GoldStar 262,144 WORDS X16BIT CMOS DYNAMIC RAM GOLDSTAR ELECTRON CO., LTD. Description Features The GM71C4260A/AL is th e new generation d y n am ic RAM organized 2 6 2 ,1 4 4 x 1 6 Bit. GM71C4260A/AL has realized higher density,

LCB007

Abstract: LEA100K LSI Product Selector Guide "content addressable memory" array memory blocks amd 2901 alu 7400 logic gate ic
Contextual Info: L S I LOGIC CORP 53GMÔ04 00Q400D 7 M L L C M2E D T-IZ-tl-O'i LEA100K Embedded Array Series Description The LEA100K Embedded A rray™ Series is an HCMOS ASIC product which combines the benefits of cell-based and array-based ASICs. Designspecific, user-defined, semicustom, standard cell

S2184

Abstract: A123 scr 16 a NIOS16 G10X2
Contextual Info: Nios Embedded Processor Software Development Reference Manual 101 Innovation Drive San Jose, CA 95134 408 544-7000 http://www.altera.com Document Version: Document Date: 3.0 January 2003 Copyright Nios Embedded Processor Software Development Reference Manual