*3525* SOIC8 Search Results

Contextual Info: CTS100ELT23 Dual Differential PECL to CMOS/TTL Translator MSOP8, SOIC8 Features Block Diagram   3.5ns Typical Propagation Delay <500ps Typical Output to Output Skew  Differential PECL Inputs  Flow Through Pinouts  CMOS/TTL Outputs  RoHS Compliant Pb Free Packages

Contextual Info: CTS100LVEL58 LVPECL 2:1 Multiplexer MLP8, MSOP8, SOIC8 Features       Block Diagram 440ps Propagation Delay  Operating Voltage of 3.0 to 5.5V Internal Input Pull-down Resistors Direct Replacement for ON Semi MC100LVEL58 ROHS Compliant Pb Free Packages

Contextual Info: CTS100LVEL11 LVPECL 1:2 Differential Fan-out Buffer MLP8, MSOP8, SOIC8 Features Block Diagram 265ps Propagation Delay 5ps Skew Between Outputs Internal Input Pull-Down Resistors Direct Replace for ON Semi MC100LVEL11 and MC100EL11  RoHS Compliant Pb Free Packages

HL33G

Contextual Info: CTS100LVEL33 LVPECL Divide by 4 Divider MLP8, MSOP8, SOIC8 Features Block Diagram 5.0+ GHz Toggle Frequency 470ps Propagation Delay Internal Input Pull-down Resistors 3.0V to 5.5V Power Supply  RoHS Compliant Pb Free Packages     Description

Contextual Info: CTS100LVEL32 LVPECL Divide by 2 Divider MLP8, MSOP8, SOIC8 Features Block Diagram 3.0+ GHz Toggle Frequency 470ps Propagation Delay Internal Input Pull-down Resistors 3.0V to 5.5V Power Supply  RoHS Compliant Pb Free Packages     Description

ARIZONA MICROTEK

Abstract: MARKING HT23
Contextual Info: AZ100ELT23 Dual Differential PECL to CMOS/TTL Translator www.azmicrotek.com DESCRIPTION The AZ100ELT23 is a dual differential PECL to CMOS/TTL translator. Because PECL Positive ECL levels are used, only VCC and ground are required. The small outline 8-lead packaging and the low skew, dual gate

AZ100ELT23

Contextual Info: AZ100ELT23 Dual Differential PECL to CMOS/TTL Translator www.azmicrotek.com DESCRIPTION The AZ100ELT23 is a dual differential PECL to CMOS/TTL translator. Because PECL Positive ECL levels are used, only VCC and ground are required. The small outline 8-lead packaging and the low skew, dual gate

AZ100ELT21

Abstract: ARIZONA MICROTEK
Contextual Info: AZ100ELT21 Differential PECL to CMOS/TTL Translator DESCRIPTION The AZ100ELT21 is a differential PECL to CMOS/TTL translator. Because PECL Positive ECL levels are used, only VCC and ground are required. The small outline 8-lead packaging and the single gate of the

AZ100LVEL58

Abstract: ARIZONA MICROTEK
Contextual Info: AZ100LVEL58 www.azmicrotek.com PECL/ECL 2:1 Multiplexer DESCRIPTION FEATURES The AZ100LVEL58 is a 2:1 multiplexer. The device is pin and functionally equivalent to the AZ100EL58. With AC performance similar to the AZ100EL58 device, the LVEL58 is ideal for the low voltage applications

AZ100LVEL16

Contextual Info: AZ100LVEL16 PECL/ECL Differential Receiver www.azmicrotek.com DESCRIPTION FEATURES The AZ100LVEL16 is a differential receiver with an internal input clamp. It is ideally suited for interfacing with high frequency sources. Under open input conditions, the internal input clamp will force the Q output LOW and

Contextual Info: AZ100LVEL16 PECL/ECL Differential Receiver www.azmicrotek.com DESCRIPTION FEATURES The AZ100LVEL16 is a differential receiver with an internal input clamp. It is ideally suited for interfacing with high frequency sources. Under open input conditions, the internal input clamp will force the Q output LOW and

AZ100LVEL11

Abstract: AZM100LVEL11
Contextual Info: AZ100LVEL11 www.azmicrotek.com PECL/ECL 1:2 Differential Fanout Buffer FEATURES DESCRIPTION • • • The AZ100LVEL11 is a differential 1:2 fanout gate. The device is functionally similar to the E111 device but with higher performance capabilities. Having within-device skews and output transition times

Contextual Info: LM3525 www.ti.com SNVS051D – FEBRUARY 2000 – REVISED MARCH 2013 LM3525 Single Port USB Power Switch and Over-Current Protection Check for Samples: LM3525 FEATURES DESCRIPTION • • • The LM3525 provides Universal Serial Bus standard power switch and over-current protection for all host

AZ100LVEL32

Abstract: ECL divider marking C2G
Contextual Info: AZ100LVEL32 PECL/ECL ÷2 Divider www.azmicrotek.com FEATURES DESCRIPTION • • • The AZ100LVEL32 is an integrated ÷2 divider. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flop will attain a random logic state; the reset allows for the

lm3525

Contextual Info: LM3525 www.ti.com SNVS051D – FEBRUARY 2000 – REVISED MARCH 2013 LM3525 Single Port USB Power Switch and Over-Current Protection Check for Samples: LM3525 FEATURES DESCRIPTION • • • The LM3525 provides Universal Serial Bus standard power switch and over-current protection for all host

Contextual Info: LM3525 www.ti.com SNVS051D – FEBRUARY 2000 – REVISED MARCH 2013 LM3525 Single Port USB Power Switch and Over-Current Protection Check for Samples: LM3525 FEATURES DESCRIPTION • • • The LM3525 provides Universal Serial Bus standard power switch and over-current protection for all host

SN65ELT21

Contextual Info: SN65ELT21 www.ti.com. SLLS923 – JUNE 2009 5-V PECL-to-TTL Translator

MC100ELT23

Abstract: SN65ELT23 SN65ELT23D SN65ELT23DGK SN65ELT23DGKR SN65ELT23DR
Contextual Info: SN65ELT23 www.ti.com. SLLS925 – JUNE 2009 5-V Dual Differential PECL Buffer-to-TTL Translator

HL04

Abstract: HL-04 HEL04 KEL04 E104 MC100EL04 MC10EL04
Contextual Info: MC10EL04, MC100EL04 5V ECL 2-Input AND/NAND The MC10EL/100EL04 is a 2‐input AND/NAND gate. The device is functionally equivalent to the E104 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E104, the EL04 is ideally suited for those

ELT21

Abstract: MC100ELT21 MC10ELT21 SN65ELT21 SN65ELT21D SN65ELT21DGK SN65ELT21DGKR SN65ELT21DR
Contextual Info: SN65ELT21 www.ti.com. SLLS923 – JUNE 2009 5-V PECL-to-TTL Translator

Contextual Info: SN65ELT23 www.ti.com. SLLS925 – JUNE 2009 5-V Dual Differential PECL Buffer-to-TTL Translator

Contextual Info: SN65ELT21 www.ti.com. SLLS923 – JUNE 2009 5-V PECL-to-TTL Translator

Contextual Info: SN65ELT23 www.ti.com. SLLS925 – JUNE 2009 5-V Dual Differential PECL Buffer-to-TTL Translator

MC100ELT23

Abstract: SN65ELT23 SN65ELT23D SN65ELT23DGK SN65ELT23DGKR SN65ELT23DR
Contextual Info: SN65ELT23 www.ti.com. SLLS925 – JUNE 2009 5-V Dual Differential PECL Buffer-to-TTL Translator