"24 PIN" DRAM Search Results

MA2180

Abstract: intel socket 423 pin assignments
Contextual Info: 64Mx72 bits PC100 SDRAM Registered DIMM with PLL, based on 64Mx4 SDRAM with LVTTL, 4 banks & 8K Refresh HYM72V64C756B L T4 Series DESCRIPTION The HYM72V64C756B(L)T4 -Series are high speed 3.3-Volt synchronous dynamic RAM Modules composed of eighteen 64Mx4 bit Synchronous DRAMs in 54-pin TSOPII, two 48-pin SOP Register Buffers, one 24-pin SOP PLL and 8-pin

bt dof

Contextual Info: •HYUNDAI HYM536410 Series SEMICONDUCTOR 4M X 36-bit CMOS DRAM MODULE PRELIMINARY DESCRIPTION The HYM536410 is a 4M x 36-bit Fast page mode CMOS DRAM module consisting of eight HY5117400 in 24/28 pin SOJ and four HY514100A In 20/26 pin SOJ on a 72 pin glass-epoxy printed circuit board. 0 .2 ^uF decoupling

Z0301

Contextual Info: •HYUNDAI HYM53641 OB Series SEMICONDUCTOR 4M X 36-bit CMOS DRAM MODULE PRELIMINARY DESCRIPTION The HYM536410B is a 4M x 36-bit Fast page mode CMOS DRAM module consisting of nine HY5117400 in 24/28 pin SOJ on a 72 pin glass-epoxy printed circuit board. Q.22pF decoupling capacitor is mounted for each DRAM.

Contextual Info: “H Y U N D A I HYM536A410A M-Series 4M X 36-bit CMOS DRAM MODULE DESCRIPTION The HYM536A41OA is a 4M x 36-bit Fast page mode CMOS DRAM module consisting of nine HY5117400A in 24/26 pin SOJ on a 72 pin glass-epoxy printed circuit board. 0.22^F decoupling capacitor is mounted for each DRAM.

Contextual Info: •HYUNDAI HYM536A814A M-Series 8M x 36-bit CMOS DRAM MODULE with EXTENDED DATA OUT DESCRIPTION The HYM536A814A is a 8M x 36-bit EDO mode CMOS DRAM module consisting of eighteen HY5117404A in 24/26 pin TSOPII on a 72 pin glass-epoxy printed circuit board. 0.1 jaF and 0.01 |xF decoupling capacitors are mounted

Contextual Info: HYUNDAI H Y M 5 9 1 6 1 0 SEMICONDUCTOR 16M X S e r ie s 9-bit CMOS DRAM MODULE PRELIMINARY DESCRIPTION The HYM591610 is a 16M x 9-bit Fast page mode CMOS DRAM module consisting of nine HY5117100 in 24/28 pin SOJ or TSOF-II on a 30 pin glass-epoxy printed circuit board. 0.22pF decoupling capacitor is mounted for

Contextual Info: • HYUNDAI _ HYM572A414A K-Series Unbuffered 4M x 72-bit CMOS DRAM MODULE with EXTENDED DATA OUT DESCRIPTION The HYM572A414A is a 4M x 72-bit EDO mode CMOS DRAM module consisting of eighteen HY5117404A in 24/26 SOJ or TSOP-II and one 2048 bit EEPROM on a 168 pin glass-epoxy printed circuit board. 0.1 nF and 0.01 uF

Contextual Info: 000 THA-05210 IUC DATA DEVICE CORPORATION HIGH SPEED TRACK/HOLD HYBRID 150 nsec Acquisition Time ± 0.005% Linearity Error FEATURES •L O W COST DESCRIPTION The THA-05210 is a low cost, high speed, high accuracy track/hold am­ plifier packaged in a hermetic 24 pin

AX2022

Abstract: TACT2150 D6142
Contextual Info: TACT2150 512 X 8 CACHE ADDRESS COMPARATOR D 2 9 9 3 . JA N U A R Y 1 9 8 7 - R E V IS E D SEPTEM BER 1967 Address to MATCH Valid Time TACT2150-20 . . . 20 ns max TACT2150-30 . . . 30 ns max DW, JD . OR NT PACKAGE 300-Mil 24-Pin Ceramic Side-Brazed or Plastic Dual-In-Line or Small Outline

Contextual Info: HY51V S 17400HG/HGL 4M x 4Bit Fast Page DRAM PRELIMINARY DESCRIPTION The HY51V(S)17400HG/HGL is the new generation dynamic RAM organized 4,194,304 words x 4bit. HY51V(S)17400HG/HGL has realized higher density, higher performance and various functions by utilizing advanced CMOS process technology. The HY51V(S)17400HG/HGL offers Fast Page Mode as a high

HY5118160

Contextual Info: H Y 5 1 1 8 1 6 0 ‘H Y U N D A I S e r ie s 1Mx 16-bit CMOS DRAM with 2CAS DESCRIPTION The HY5118160 is the new generation and fast dynamic RAM organized 1,048,576 x 16-bit. The HY5118160 utilizes Hyundai's CMOS silicon gate process technology as well as advanced circuit techniques to provide wide

10 switch coded 18 pin ic

Abstract: lm386 audio amplifier PCB diagram transistor 13030 stage play function of ic LM386 LM386 BLOCK DIAGRAM DESCRIPTION LM386 PIN DIAGRAM 8656B HT8656 LM386
Contextual Info: HT8656 Talking Back Features • • • • • Operating voltage: 4.5V~5.5V ADM algorithm DRAM selection: – 64K – 256K Sampling rate selection: – 32Kb – 16Kb Auto stop recording – 0.5 seconds silence is detected – Recording capacity is full •

Contextual Info: HYUNDAI HY51V16404B Series 4M X 4-bit CMOS DRAM with Extended Data Out DESCRIPTION The HY51V16404B is the new generation and fa st dynam ic RAM organized4,194,304 x 4-bit. The HY51V16404B utilizes Hyundai’s CM OS silicon gate process technology as advanced circuit techniques to provide wide operating

Contextual Info: H Y 5 1 4 4 0 0 A • H Y U N D A I S e r ie s 1Mx 4-bit CMOS DRAM DESCRIPTION The HY514400A is the 2nd generation and fast dynamic RAM organized 1,048,576 x 4-bit. The HY514400A utilizes Hyundai’s CMOS silicon gate process technology as well as advanced circuit techniques to provide wide operating

DDR2 SSTL class

Abstract: ck2142 HYMP564U64 DM0165
Contextual Info: 64Mx64 / 64Mx72 bits Unbuffered DDR2 SDRAM DIMM HYMP564U648/HYMP564U728 DESCRIPTION Preliminary Hynix HYMP564U64 72 8 series is unbuffered 240-pin double data rate 2 Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 64Mx64(72) high-speed memory arrays. Hynix HYMP564U64(72)8 series

Contextual Info: H Y C 5 3 6 4 1 0 • • H Y U N D A I S e r i e s 4Mx36 DRAM CARD DESCRIPTION The HYC536410 is the DRAM memory card consisting of eight HY5117400ASLTand four HY5141OOALT built in the metal plate housing. The Hyundai DRAM card is optimized forthe applications such as buffering, main and add-in

Contextual Info: IBM13M8734HCB 8M x 72 1 B ank R egistered S D R A M M odule Features • 168-Pin Registered 8-Byte Dual In-Line Memory Module • 8Mx72 Synchronous DRAM DIMM • Performance: : ; DIMM CAS Latency • • • • • • • ; -75A Reg. 4 ; Units ; fCK ; Clock Frequency

Contextual Info: -HYUNDAI H Y M 5 3 6 1 0 0 A M -S e r ie s I M l 36-blt CMOS DRAM MODULE DESCRIPTION The HYM536100A is a 1M x 36-bit Fast page mode CMOS DRAM module consisting of eight HY514400A in 20/26 pin SOJ and four HY531000A in 20/26 pin SOJ on a 72 pin glass-epoxy printed circuit board. 0.22fiF decoupling

Contextual Info: IBM0116405 IBM0116405M IBM0116405B IBM0116405P 4M x 4 12/10 EDO DRAM Features • Low Power Dissipation - Active max - 85mA / 75 mA / 65 mA - Standby: TTL Inputs (max) - 2.0 mA - Standby: CMOS Inputs (max) - 1.0 mA (SP version) - 0.2 mA (LP version) - Self Refresh (LP version only)

Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590A – DECEMBER 1997 – REVISED OCTOBER 2001 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps

M11B416256A-35J

Abstract: M11B416256A ELITE* M11B416256A
Contextual Info: OLWH07 M11B416256A DRAM 256 K x 16 DRAM EDO PAGE MODE FEATURES y y y y y y y y y ORDERING INFORMATION - PACKAGE X16 organization EDO (Extended Data-Output access mode 2 CAS Byte/Word Read/Write operation 40-pin 400mil SOJ 44 / 40-pin 400mil TSOP (TypeII)

1AC12

Contextual Info: HY51V4400B Series • HYUNDAI 1M X 4-bit CMOS DRAM DESCRIPTION The HY51V4400B is the new generation and fast dynamic RAM organized 1,048,576 x 4-bit.The HY51V4400B utilizes Hyundai's C M OS silicon gate process technology as well as advanced circuit techniques to provide wide

Contextual Info: Ȋfl h y u h d a i 'f i SEMICONDUCTOR HYM59256A * 256KX 9-Bit CMOS DRAM MODULE M451201A-APR91 DESCRIPTION The HYM59256A is a 256K words by 9bits dynamic RAM module and consists o f Fast Page mode CMOS DRAMs of two HY534256J in 20/26 pin SOJ and one HY53C256LF in 18

d947

Abstract: hy51v18164b
Contextual Info: • « H Y U N D A I H Y M 5 V 7 2 A 1 2 4 A R - S e r ie s Unbuffered 2M x 72-bit CMOS DRAM MODULE with EXTENDED DATA OUT DESCRIPTION The HYM5V72A124A is a 2M x 72-bit EDO mode CMOS DRAM module consisting of two HY51V4404B in 20/26 pin SOJ or TSOP-II, four HY51V18164B 42/42 pin SOJ or 44/50 pin TSOP-II and one 2048bit EEPROM on a 168