YS-202 B Search Results

Contextual Info: Features_ Benefits_ • Thumbwheel/Screwdriver Adjustment ■ Linear and Non-Linear Tapers . ■ 5000 M echanical Cycles . ■ Snap-In Panel Mount . ■ Versatility ■ Versatility

STV 1H

Abstract: VIDEO TIMING CONTROLLER POL OEV cmos camera CIRCUIT diagram CPH1
Contextual Info: ICs for Video Camera AN2537FHQ Liquid crystal signal processing IC with built-in AV panel controller • Overview ■ Applications 36 25 24 0.75 7.00±0.20 9.00±0.40 37 (0.75) 13 1 12 0.50 +0.10 0.20–0.05 Seating plane +0.10 48 0.15–0.05 • Built-in serial interface circuit

Contextual Info: SK4383 PO SHRO M C N H JST O E S B E LE V E S TH E DATA ON THIS • to r- - REVISION RECORD ECO 1 9 6 7 3 DATE RET 7-8 08 NC " O F CHARGE, THE USER EM PLO YS SUCH INFORMATION AT HIS OWN D6CRETION AND R S K . POSITRONIC M D U STRES ASSUM ES NO

AN5395FBP

Abstract: QFH048-P-1212A
Contextual Info: ICs for TV AN5395FBP Contour correction IC for HDTV • Overview Unit: mm 14.2±0.4 12.0±0.3 The AN5395FBP is a contour correction IC which enables correction band changeover for base band HDTV, MUSE, progressive NTSC TV. 36 25 24 1.60 12.0±0.3 14.2±0.4

AB45S

Contextual Info: ICs for Video Camera AN2537FHQ Liquid crystal signal processing IC with built-in AV panel controller • Overview Unit: mm 9.00±0.40 7.00±0.20 36 25 24 37 12 0.50 +0.10 0.20–0.05 +0.10 1 0.15–0.05 0.75 (1.00) Seating plane (0.625) 0.10±0.10 ea s ht e v

YH 504

Contextual Info: Type Y H o t-M o ld e d Trimming Potentiometers C ; i Features- Benefits_ • Thumbwheel/Screwdriver Adjustment ■ Linear and Non-Linear Tapers . ■ 5000 Mechanical Cycles . ■ Snap-In Panel Mount .

mob4

Abstract: MOA8 YS-202 B MOA2
Contextual Info: CXD2072AQ 1/4 IL08 C-MOS SCAN CONVERTER 160 VDD NC VDD NC 105 VDD NC VDD 110 115 120 125 130 135 140 145 150 NC NC VDD GND 157 GND NC GND 156 155 —TOP VIEW— GND NC NC 100 165 NC 170 GND NC GND 180 185 190 GND AVDD VDD AGND DVDD AVDD GND DGND NC NC VDD

design HF PSK modem

Abstract: 202 MODEM SSI 73k302l
Contextual Info: SSI 73K302L mmMkntí' Bell 212A, 103, 202 Single-Chip Modem A TDK Group/Company Preliminary Data January 1994 DESCRIPTION FEATURES The SSI 73K302L is a highly integrated single-chip modem 1C which provides the functions needed to construct a Bell 202, 212A and 103 compatible

Contextual Info: L8C201/202/203/204 l o g ic 512/1K/2K/4K x 9-bit Asynchronous FIFO DEVICES INCORPORATED FEATURES_ DESCRIPTION □ First-In/First-Out FIFO using Dual-Port Memory □ Advanced CMOS Technology □ High Speed — to 10 ns Access Time □ Asynchronous and Simultaneous

Contextual Info: s e MIKROn V rsm V rrm Ifrm s Ifa v V Ultrafast Epitaxial Diode Modules maximum value for continuous operation 110 A | (sin. 325 A 1 8 0 ; Tease = 8 5 ° C ; 5 0 4 8 ,5 A Hz) 207 A 100 SKKD 50 E 01 200 SKKD 50 E 02 SKND 50 E 02 SKMD 202 E 02 SKND 202 E 02

05Z100

Contextual Info: SIEMENS FEATURES • • • • • • • High Current Transfer Ratio, 75% to 450% Minimum Current Transfer Ratio; 10% Guaranteed 6 Ip = 1mA High'Cottector-Enrittsr Voltage, BVCj 0 = 70V Long Term Stability Industry Standard DlPPackage Underwriters Lab File #E52744

Contextual Info: r r z Ä 7# S G S -T H O M S O N ^D ^@aiCT^@lD Si M54HC42 M 74HC42 BCD TO DECIMAL DECODER . HIGH SPEED tpo = 13 ns (TYP. AT Vcc = 5 V • LOW POWER DISSIPATION Icc = 4 nA (MAX.) AT T a = 25 °C ■ HIGH NOISE IMMUNITY V nih = V n il = 28 % V c c (MIN.) ■ OUTPUT DRIVE CAPABILITY

Contextual Info: NOTES: 1. eng MATING: f ile c u ,^ 4 0 0 2 . - e o o -2 Interface dimensions per Mil-C-39012/TNC Series and Solitron/Microwave MD-108. 2. MATERIALS: .0 3 5 D iA . W iE & L cc'< 1 - i o L E S Body, Clamp Nut, Coupling Nut, Clamp and Center Contact:- Brass h H per QQ-B-626, Alloy 360.

Contextual Info: lowprofile ECL COM PATIBLE 8-BIT DELAY LINE • • • # E C L input and output levels Delays stable and precise 64-pin DIP package .250 high Available in delays up to 1287ns # Available in 5 delay steps with resolution from 1ns to 5ns Propagation delays fully compensated

Contextual Info: VF960/961 V C X o VF960/VF961 ECL/PECL Compatible Hybrid VCXO Standard 14 Pin DIP Package Parameter FEATURES • • • • No Frequency Multiplication is Used Very Low Phase Jitter Low Component Count Pullability ±500 ppm available Input Break Down Voltage

Contextual Info: Light Emitting Diodes High efficiency, single-digit numeric displays LA-801 FP Series T h e LA-801 FP s e rie s a re LED n u m e r­ • E x t e r n a l d im e n s io n s Unit: m m ic d is p la y s d e s ig n e d t o b e u s e d in 2 0 .0 + 0.2 b r ig h t lo c a tio n s . T h e h e ig h t o f th e

Contextual Info: m o le x FEATURES AND SPECIFICATIONS Features and Benefits Electrical • ■ ■ ■ Voltage: 300V M axim um Current: 30 Amp Insulation Resistance: > 5 ,0 0 0 M egaohm s 2 to 30 circuits Robust and durable Low profile Wide variety of options 11.10mm .4381 Pitch

line polygon

Abstract: Texture mapping YGV612
Contextual Info: 1995.09.01 PRELIMINARY YGV612 RPA2 Rendering Polygon Accelerator2 • OVERVIEW RPA2 is an LSI that processes 2D and 3D graphics on a PC at higher speeds. Operations such as line drawing, Bit Bit, hidden surface removal by Z buffer, Gouraud shading and texture mapping can be performed by the hardware.

scr 219

Contextual Info: SERIES 73 .438" PCB Barrier Terminal Strip D escription Features The series 73, PCB barrier terminal strip is one of our most versatile product series offering a broad range of screw, terminal and hardware options. The terminal block can be configured for maximum 14, 12 or 10 AWG wires and

Analog Delay Lines

Abstract: SLTN analog delay line
Contextual Info: A n a lo g in p u t a nd o u tp u t A ll d e la y s d ig ita lly p ro g ra m m a b le D e la ys s ta b le a n d p re cise 1 4 -p in DIP p a c k a g e .2 4 0 hig h A v a ila b le in d e la y s u p to 3 6 n s A v a ila b le in 1 0 d e la y s te p s w ith re s o lu tio n

S101S02

Abstract: Model 260J 1000H 30S2 CY1949E02
Contextual Info: 1. Application This specification applies to the structure and characteristics of SIP type Solid State Relay SSR , Model No. S101S02. 2- 3. Out1ioe 2.1 Refer to the attached drawing No. CY1949E02. 2.2 (1) Trade mark. (2) Hodel Mo. and (3) Lot symbol shall be

Contextual Info: HITACHI/ LOGIC/ARRAYS/MEN T2 DEI 4 4IikiE03 0010404 S > HD74HC298 92D 10484 # Quad. 2-input Multiplexers with storage) PIN ARRANGEMENT This circuit is controlled by the signals word select and clock. When the word select input is taken low w ord 1 (A 1, B i,

T6A90

Contextual Info: T6A90 ROW DRIVER FOR A DOT MAT RIX LCD T h e T 6 A 9 0 is a 1 0 0 - c h a n n e l o u t p u t S T N d o t m a t r i x L C D. drive voltage. rowdriver for a The T6A90 feature 42V LCD T h e T 6 A 9 0 is a b l e p a n e l s w i t h a d u t y r a t i o up to d r i v e L C D

DS5035

Contextual Info: MT88E39 CMOS Calling Number Identification Circuit Advance Information CNIC1.1 SEMICONDUCTOR DS5035_ ISSUE 3_ N ovem ber 1998 Features 1200 baud Bell 202 and CCITT V.23 Frequency Shift Keying (FSK) demodulation Ordering Information