XTAL 25MHZ Search Results

crystal 32kHz jitter

Contextual Info: PI6C490097 PLL Clock Multiplier Features Description ÎÎSupport XTAL or Clock input at 25MHz The PI6C490097 is a low jitter clock generator supporting either XTAL or reference input. Two of its buffered outputs can support wide operating voltage from 1.8V to 3.3V. It is a cost

Contextual Info: PI6C490097 PLL Clock Multiplier Features Description ÎSupport XTAL or Clock input at 25MHz he PI6C490097 is a low jitter clock generator supporting either XTAL or reference input. Two of its bufered outputs can support wide operating voltage from 1.8V to 3.3V. It is a cost

PI6C490098

Abstract: 25Mhz 16pF crystal
Contextual Info: PI6C490098 1:3 25MHz Clock Buffer Features Description ÎÎSupport XTAL or Clock input at 25MHz The PI6C490098 is a low jitter clock buffer supporting either XTAL or reference input. Two of its outputs can support wide operating voltage from 1.8V to 3.3V. It is a cost effective way to

Contextual Info: PI6C490098 1:3 25MHz Clock Buffer Features Description ÎSupport XTAL or Clock input at 25MHz he PI6C490098 is a low jitter clock bufer supporting either XTAL or reference input. Two of its outputs can support wide operating voltage from 1.8V to 3.3V. It is a cost efective way to

Oscilloscope USB 200Mhz Schematic

Abstract: 24LC001 ad9958 Application 74LVC125A AD9958 AD9959 ETC1-1-13 1KP0
Contextual Info: Evaluation Board for 2-Channel 500 MSPS DDS with 10-Bit DACs AD9958/PCB EVALUATION BOARD BLOCK DIAGRAM AD9958 EVALUATION BOARD XTAL BUFFER/XTAL OSCILLATOR J9 BALUN REFCLK MULTIPLIER 4X TO 20X MUX REF_CLK SYS CLK J3 DAC 0 OUT J7 J13 ÷4 SYNC_CLK SYS CLK SYS

Oscilloscope USB 200Mhz Schematic

Abstract: AD9959 AD9959 eval-board FSK ask psk 74LVC125A AD9958 ETC1-1-13 AD9959 equivalent sdio-3 AD9959 0.1uF
Contextual Info: Evaluation Board for 4-Channel 500 MSPS DDS with 10-Bit DACs AD9959/PCB EVALUATION BOARD BLOCK DIAGRAM AD9959 EVALUATION BOARD XTAL J2 DAC 0 OUT BUFFER/XTAL OSCILLATOR J9 J6 DAC 0 FILTER OUT BALUN REFCLK MULTIPLIER MUX REFCLK SYS CLK SYS CLK DAC 0 IOUT DDS 0

M88E1111

Abstract: xcf32pv048 u3843 M88E1111 datasheet vga codec fb0805 SYSTEMACE TQFP144 XCF32P-V048 7a176 DIP41
Contextual Info: 4 3 2 1 Power Supply Differential SMA Clocks D 64 bit LVDS Expansion Header GPIO 5V PWR Jack Optional USER Xtal D VGA 3.3V@3A 100MHz Xtal 2.5V@3A AC97 Audio 1.8V@150mA Linear Flash 1.2V@6A IIC EEPROM Linear Flash 1.25V@1.4A C C Virtex 4 UART CPLD XC95144XL

M88E1111

Abstract: fb0805 DIP41 M88E1111 datasheet xcf32pv048 365R XTAL-SMD m21 sot23 transistor transistor C458 C4751
Contextual Info: 4 3 2 1 Power Supply Differential SMA Clocks D 64 bit LVDS Expansion Header GPIO 5V PWR Jack Optional USER Xtal VGA D Switcher 3.3V@6A max 100MHz Xtal Switcher 2.5V@6A max Linear 1.5V@5A max AC97 Audio Linear Flash Linear 1.2V VREF Switcher 1.5V@6A max IIC

Contextual Info: PI6C490086 PLL Clock Multiplier Features Description ÎÎSupport XTAL or Clock input at 25MHz The PI6C490086 is a low jitter clock generator supporting either XTAL or reference input. Two of its buffered outputs can support wide operating voltage from 1.8V to 3.3V. It is a cost effective way to generate multiple outputs for all kinds of applications that need 25MHz with different power supplies and a 8.192

Contextual Info: PI6C490086 PLL Clock Multiplier Features Description ÎSupport XTAL or Clock input at 25MHz he PI6C490086 is a low jitter clock generator supporting either XTAL or reference input. Two of its bufered outputs can support wide operating voltage from 1.8V to 3.3V. It is a cost effective way to generate multiple outputs for all kinds of applications that need 25MHz with diferent power supplies and a 8.192

PLL520-56

Abstract: PLL520 PLL5205
Contextual Info: Preliminary PLL520-56 Hi-Drive CMOS Low Phase Noise VCXO for 25-55MHz Fund Xtal PIN CONFIGURATION FEATURES 25MHz to 55MHz Fundamental Mode Crystal. Output range: 25MHz – 55MHz (no PLL). Integrated variable capacitors. High Current CMOS output drive (45pF CLoad).

PI6C49003A

Abstract: Q432 PI6c49003ae
Contextual Info: PI6C49003 Networking Clock Generator Features Description • 3.3V +/-10% Supply Voltage • Uses 25MHz xtal such as Saronix-eCera SRX7278 • Five PCIe 100MHz outputs with optional -0.5% spread spectrum support • Two LVCMOS 50MHz outputs that support +/- 10%

ultrafire

Abstract: 82C842 opti chipset OPTI TSB21LV03A
Contextual Info: TriFire Industry-standard IEEE-1394 physical interface IC Product Highlights Features • Conforms to IEEE 1394 published standards ■ 3 fully independent ports ■ 100, 200 and 400 Mbit operation ■ 400 MHz internal PLL, with external 25MHz xtal ■

Contextual Info: PI6C49004 Networking Clock Generator Features Description • 3.3V +/-10% Supply Voltage • Uses 25MHz xtal such as Saronix-eCera SRX7278 • Twelve PCIe 100MHz outputs with optional -0.5% spread spectrum support • Two LVCMOS 50MHz outputs that support +/- 10%

FGL699AL

Abstract: 9FGL699
Contextual Info: DATASHEET 9FGL699 6-OUTPUT LOW POWER DIFFERENTIAL SYNTHESIZER FOR PCIE GEN2 Description Features/Benefits The 9FGL699 is a 6-output low-power clock sythesizer for PCIe Gen2. It runs from a 25MHz XTAL, provides spread spectrum capability, and has an SMBus for software control

FGL699AL

Contextual Info: DATASHEET 9FGL699 6-OUTPUT LOW POWER DIFFERENTIAL SYNTHESIZER FOR PCIE GEN2 Description Features/Benefits The 9FGL699 is a 6-output low-power clock sythesizer for PCIe Gen2. It runs from a 25MHz XTAL, provides spread spectrum capability, and has an SMBus for software control

7498 pin configuration

Abstract: AD9572 106M AN-586
Contextual Info: Fiber Channel/Ethernet Clock Generator IC, PLL Core, Dividers, 7 Clock Outputs AD9572 FEATURES FUNCTIONAL BLOCK DIAGRAM REFSEL XTAL OSC CMOS 1 x 25MHz REFCLK LVPECL OR LVDS DIVIDERS LPF 3RD ORDER PFD/CP LDO VCO 2 × 106.25MHz LVPECL OR LVDS 1 × 156.25MHz

9FGL

Contextual Info: DATASHEET 6-OUTPUT LOW-POWER DIFFERENTIAL SYNTHESIZER FOR PCIE GEN1/2/3 9FGL639 Description Features/Benefits The 9FGL639 is a 6-output low-power clock sythesizer for PCIe Gen1/2/3. It runs from a 25MHz XTAL, provides spread spectrum capability, and has an SMBus for software

Contextual Info: Fiber Channel/Ethernet Clock Generator IC, 7 Clock Outputs AD9572 FEATURES FUNCTIONAL BLOCK DIAGRAM REFSEL XTAL OSC CMOS 1 x 25MHz REFCLK LVPECL OR LVDS DIVIDERS LPF THIRD ORDER PFD/CP LDO VCO 2 × 106.25MHz LVPECL OR LVDS 1 × 156.25MHz LVPECL OR LVDS DIVIDERS

Contextual Info: DATASHEET 6-OUTPUT LOW POWER DIFFERENTIAL SYNTHESIZER FOR PCIE GEN2 9 FGL6 9 9 Description Features/Benefits The 9FGL699 is a 6-output low-power clock sythesizer for PCIe Gen2. It runs from a 25MHz XTAL, provides spread spectrum capability, and has an SMBus for software control

Contextual Info: PI6C49X0210 High Performance 1:10 Multi-Voltage CMOS Buffer Features Applications • 10 single-ended outputs Fanout Buffer • Ultra low output RMS phase jitter = 0.1ps typ. • Selectable reference inputs support Xtal (10~50MHz), singleended and differential

PI6C49X

Contextual Info: PI6C49X0210 High Performance 1:10 Multi-Voltage CMOS Buffer Features Applications • 10 single-ended outputs Fanout Buffer • Ultra low output RMS phase jitter = 0.1ps typ. • Selectable reference inputs support Xtal (10~50MHz), singleended and differential

AD9572-EVALZ-LVD

Abstract: AD9572 sine wave grid tie schematic 125M osc SFP EVALUATION BOARD 10G
Contextual Info: Fiber Channel/Ethernet Clock Generator IC, 7 Clock Outputs AD9572 FEATURES FUNCTIONAL BLOCK DIAGRAM REFSEL XTAL OSC CMOS 1 x 25MHz REFCLK LVPECL OR LVDS DIVIDERS LPF THIRD ORDER PFD/CP LDO VCO 2 × 106.25MHz LVPECL OR LVDS 1 × 156.25MHz LVPECL OR LVDS DIVIDERS

schematic lvds

Abstract: AD9572 106M AN-586 SFP PHY SFP EVALUATION BOARD 10G
Contextual Info: Fiber Channel/Ethernet Clock Generator IC, 7 Clock Outputs AD9572 FEATURES FUNCTIONAL BLOCK DIAGRAM REFSEL XTAL OSC CMOS 1 x 25MHz REFCLK LVPECL OR LVDS DIVIDERS LPF THIRD ORDER PFD/CP LDO VCO 2 × 106.25MHz LVPECL OR LVDS 1 × 156.25MHz LVPECL OR LVDS DIVIDERS