XCR3128 Search Results

XCR3128XL-10VQ100I

Abstract: XCR3128XL-10TQ144I XCR3128XL-7CS144I XCR3128XL XCR3128XL-10CS144I XCR3128XL-10VQ100C CS144 marking E13 diode L12M1 k3296
Contextual Info: R XCR3128XL 128 Macrocell CPLD DS016 v2.1 August 21, 2003 14 Preliminary Product Specification Features Description • Low power 3.3V 128 macrocell CPLD • 6.0 ns pin-to-pin logic delays • System frequencies up to 175 MHz • 128 macrocells with 3,000 usable gates

verilog code for implementation of eeprom

Abstract: MC15 XCR3128A
Contextual Info: APPLICATION NOTE XCR3128A: 128 Macrocell CPLD Enhanced Clocking  DS035 v1.1 February 10, 2000 14* Product Specification Features Description • The XCR3128A CPLD (Complex Programmable Logic Device) is a member of the CoolRunner family of CPLDs from Xilinx. These devices combine high speed and zero

XCR3128

Abstract: MC16 XCR5128 SP00469B XPLA1 MC216
Contextual Info: APPLICATION NOTE This product has been discontinued. Please see www.xilinx.com/partinfo/notify/pdn0007.htm for details. R DS034 v1.3 October 9, 2000 XCR3128: 128 Macrocell CPLD 14* Product Specification Introduction Description • The XCR3128 CPLD (Complex Programmable Logic

DS016

Abstract: XCR3128XL XCR3128XL-10VQ100I XCR3128XL-10CS144C CS144 DS012 TQ144 VQ100 XCR3128XL-6VQ100C k3296
Contextual Info: R XCR3128XL 128 Macrocell CPLD DS016 v2.2 February 13, 2004 14 Preliminary Product Specification Features Description • Low power 3.3V 128 macrocell CPLD • 6.0 ns pin-to-pin logic delays The XCR3128XL is a 3.3V 128 macrocell CPLD targeted at power sensitive designs that require leading edge programmable logic solutions. A total of eight function blocks provide 3,000 usable gates. Pin-to-pin propagation delays are

Contextual Info: INTEGRATED CIRCUITS im m l y i E I TI Xilinx has acquired the entire Philips CoolRunner Low Power CPLD Product Family, For more technical or sales information, please see: www, xilin i* com XCR3128 128 macrocell CPLD Product specification Supersedes data of 1997 Aug 12

bga 0,8 mm

Abstract: XC2C32A VQ44 XC2C128 XC2C32A XC2C256 XC2C384 XC2C64A XCR3032XL CP132 XCR3128XL
Contextual Info: CoolRunner-II Family Logic Resources XC2C32A XC2C64A XC2C128 XC2C256 XC2C384 XC2C512 XCR3032XL XCR3064XL XCR3128XL XCR3256XL XCR3384XL XCR3512XL System Gates 750 1,500 3,000 6,000 9,000 12,000 750 1,500 3,000 6,000 9,000 12,000 Macrocells 32 64 128 256 384

MC16

Abstract: XCR3128A
Contextual Info: APPLICATION NOTE This product has been discontinued. Please see www.xilinx.com/partinfo/notify/pdn0007.htm for details. XCR3128A: 128 Macrocell CPLD with Enhanced Clocking  DS035 v1.3 October 9, 2000 14* Product Specification Features Description •

Contextual Info: R DS016 v1.6 April 19, 2001 XCR3128XL 128 Macrocell CPLD 14 Preliminary Product Specification Features Description • Lowest power 128 macrocell CPLD • 6.0 ns pin-to-pin logic delays • System frequencies up to 145 MHz • 128 macrocells with 3,200 usable gates

XCR3128A

Contextual Info: INTEGRATED CIRCUITS Xilinx has acquired the entire Philips CoolRunner Low Power CPLD Product Family. For more technical or sales information, please see: www.xilinx.com XCR3128A 128 macrocell CPLD with enhanced clocking Preliminary specification IC27 Data Handbook

Contextual Info: APPLICATION NOTE XCR3128XL 128 Macrocell CPLD  DS016 v1.0 April 7, 2000 14* Preliminary Product Specification Features Description • • • • The XCR3128XL is a 3.3V 128 macrocell CPLD targeted at power sensitive designs that require leading edge programmable logic solutions. A total of eight logic blocks provide 3,000 usable gates. Pin-to-pin propagation delays are

XCR3128XL

Contextual Info: R XCR3128XL 128 Macrocell CPLD DS016 v2.5 April 8, 2005 14 Product Specification Features Description • Low power 3.3V 128 macrocell CPLD • 5.5 ns pin-to-pin logic delays The CoolRunner XPLA3 XCR3128XL device is a 3.3V 128 macrocell CPLD targeted at power sensitive designs

xcr3128 ic

Abstract: PZ3128 PZ3128IS12A84 PZ3128IS15A84 PZ3128-S12A84 PZ3128-S15A84 PZ5128 XCR3128 PHILIPS 100-Pin QFP
Contextual Info: INTEGRATED CIRCUITS Xilinx has acquired the entire Philips CoolRunner Low Power CPLD Product Family. For more technical or sales information, please see: www.xilinx.com XCR3128 128 macrocell CPLD Product specification Supersedes data of 1997 Aug 12 IC27 Data Handbook

LK3124

Abstract: XCR3128 MC15 XCR5128
Contextual Info: APPLICATION NOTE R DS034 v1.2 August 10, 2000 XCR3128: 128 Macrocell CPLD 14* Product Specification Introduction Description • The XCR3128 CPLD (Complex Programmable Logic Device) is the third in a family of CoolRunner CPLDs from Xilinx. These devices combine high speed and zero power

xilinx uart verilog code

Abstract: vhdl code for rs232 receiver vhdl code for uart communication vhdl code for shift register vhdl code for serial transmitter 16 bit register vhdl vhdl code for rs232 interface UART using VHDL uart verilog code vhdl code for 8 bit shift register
Contextual Info: Application Note: CPLD R UARTs in Xilinx CPLDs XAPP341 v1.1 April 17, 2000 Summary This application note provides a functional description of VHDL and Verilog source code for a UART. The code is used to target the XC95144 and XCR3128 CPLDs. The functionality of the

XCR3128XL-10VQ100I

Abstract: XCR3128XL-10VQ100C CS144 XCR3128XL-10CS144C DS012 TQ144 VQ100 XCR3128XL XCR3128XL-6CS144C XCR3128XL-6TQ144C
Contextual Info: R XCR3128XL 128 Macrocell CPLD DS016 v2.3 July 9, 2004 14 Preliminary Product Specification Features Description • Low power 3.3V 128 macrocell CPLD • 6.0 ns pin-to-pin logic delays The XCR3128XL is a 3.3V 128 macrocell CPLD targeted at power sensitive designs that require leading edge programmable logic solutions. A total of eight function blocks provide 3,000 usable gates. Pin-to-pin propagation delays are

Contextual Info: R DS016 v1.5 April 11, 2001 XCR3128XL 128 Macrocell CPLD 14 Preliminary Product Specification Features Description • Lowest power 128 macrocell CPLD • 6.0 ns pin-to-pin logic delays • System frequencies up to 145 MHz • 128 macrocells with 3,200 usable gates

Contextual Info: XCR3128XL 128 Macrocell Automotive IQ CPLD DS119-2 v1.0 February 14, 2003 14 Features • • • • • • • • • Guaranteed to meet full electrical specifications over TA = –40°C to +125°C Technology: 0.35 µm EEPROM process Full Boundary Scan Test (IEEE 1149.1) for flexible

CS144

Abstract: DS012 TQ144 VQ100 XCR3128XL XCR3128XL-6VQ100C E1397 k3296 XCRX
Contextual Info: R XCR3128XL 128 Macrocell CPLD DS016 v1.9 January 27, 2003 14 Preliminary Product Specification Features Description • Low power 3.3V 128 macrocell CPLD • 6.0 ns pin-to-pin logic delays • System frequencies up to 175 MHz • 128 macrocells with 3,000 usable gates

vhdl code for rs232 receiver

Abstract: xilinx uart verilog code interface of rs232 to UART in VHDL vhdl code for uart communication vhdl code for serial transmitter vhdl code 16 bit microprocessor uart verilog code verilog code for serial transmitter verilog code for 8 bit shift register parallel to serial conversion vhdl
Contextual Info: Application Note: CPLD R UARTs in Xilinx CPLDs XAPP341 v1.3 October 1, 2002 Summary This application note provides a functional description of VHDL and Verilog source code for a UART. The code is used to target the XC95144, XCR3128XL, or XC2C128 CPLDs. The

XCR3128

Abstract: XCR5128 MC16 XPLA1
Contextual Info: APPLICATION NOTE This product has been discontinued. Please see www.xilinx.com/partinfo/notify/pdn0007.htm for details. R DS034 v1.4 January 19, 2001 XCR3128: 128 Macrocell CPLD 14* Product Specification Introduction Description • The XCR3128 CPLD (Complex Programmable Logic

G1339

Abstract: jtag pinout TQFP 144 PACKAGE footprint CS144 DS012 TQ144 VQ100 XCR3128XL
Contextual Info: R DS016 v1.1 May 3, 2000 XCR3128XL 128 Macrocell CPLD 14 Preliminary Product Specification Features Description • 6.0 ns pin-to-pin logic delays • System frequencies up to 145 MHz • 128 macrocells with 3,000 usable gates • Available in small footprint packages

XCR3128XL-10VQ100Q

Abstract: VQ100 VQ44 XCR3128XL XCR3128XL-10TQ144Q DS012 DS023 DS119-2
Contextual Info: XCR3128XL 128 Macrocell Automotive IQ CPLD DS119-2 v1.1 October 18, 2004 14 Features • • • • • • • • • Guaranteed to meet full electrical specifications over TA = –40°C to +125°C Technology: 0.35 µm EEPROM process Full Boundary Scan Test (IEEE 1149.1) for flexible

CS144

Abstract: DS012 TQ144 VQ100 XCR3128XL k3296
Contextual Info: R XCR3128XL 128 Macrocell CPLD DS016 v1.7 August 10, 2001 14 Preliminary Product Specification Features Description • Lowest power 128 macrocell CPLD • 6.0 ns pin-to-pin logic delays • System frequencies up to 145 MHz • 128 macrocells with 3,200 usable gates

K3296

Abstract: CS144 DS012 TQ144 VQ100 XCR3128XL
Contextual Info: R XCR3128XL 128 Macrocell CPLD DS016 v1.8 January 8, 2002 14 Preliminary Product Specification Features Description • Lowest power 128 macrocell CPLD • 6.0 ns pin-to-pin logic delays • System frequencies up to 145 MHz • 128 macrocells with 3,000 usable gates