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XC9572F Datasheets (1)

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Xilinx

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
XC9572 Family		Xilinx	XC9572: 5V ISP CPLD Family	Original	PDF	60.88KB	8

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AMD Xilinx


AMD Xilinx XC9572F-7PQ100C Flash PLD, 7.5ns, 72-Cell, CMOS, PQFP100
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Vyrian	XC9572F-7PQ100C		4,123			1 - 10 - 100 - 1000 - 10000 -	Get Quote
AMD Xilinx XC9572F-15PQG100I Flash PLD, 15ns, CMOS, PQFP100
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Vyrian	XC9572F-15PQG100I		3,937			1 - 10 - 100 - 1000 - 10000 -	Get Quote
AMD Xilinx XC9572F-10PC84C Flash PLD, 10ns, 72-Cell, CMOS, PQCC84
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Vyrian	XC9572F-10PC84C		3,745			1 - 10 - 100 - 1000 - 10000 -	Get Quote
AMD Xilinx XC9572F-10PC44C Flash PLD, 10ns, 72-Cell, CMOS, PQCC44
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Vyrian	XC9572F-10PC44C		3,664			1 - 10 - 100 - 1000 - 10000 -	Get Quote
AMD Xilinx XC9572F-7PC44C Flash PLD, 7.5ns, 72-Cell, CMOS, PQCC44
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Vyrian	XC9572F-7PC44C		3,502			1 - 10 - 100 - 1000 - 10000 -	Get Quote

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XC9572F Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
xc9572 Abstract: PC84 84-Pin Plastic Leaded Chip Carrier Contextual Info: flXILINX XC9572 In-System Programmable CPLD January, 1997 Version 1.0 Prelim inary Product Specification Features Description • • 7.5 ns pin-to-pin logic delays on all pins fCN-\|-to 125 MHz • • • 72 m acrocells with 1,600 usable gates Up to 72 user I/O pins	OCR Scan	xc9572 36v18 84-pin pq100 +3100-pin tq100 pc84 84-pin plastic leaded chip carrier	PDF
X5880 Abstract: XC9500 XC95108 XC95144 XC95180 XC95216 XC95288 XC9536 XC9572 xc9536 44 pin vqfp Contextual Info:  XC9500 In-System Programmable CPLD Family January, 1997 Version 1.1 Preliminary Product Information Features instruction set allows version control of programming patterns and in-system debugging. In-system programming throughout the full device operating range and a minimum	Original	xc9500 x5880 xc95108 xc95144 +6xc95180 xc95216 xc95288 xc9536 xc9572 xc9536 44 pin vqfp	PDF
XC9572X Abstract: xc9536 44 pin vqfp XC9572F 33vy XC9500F Contextual Info: KXILINX XC9500 In-System Programmable CPLD Family Jan ua ry, 1997 V ersion 1.1 Preliminary Product Information Features instruction set allows version control of programming pat terns and in-system debugging. In-system programming throughout the full device operating range and a minimum	OCR Scan	xc9500 xc9572x xc9536 44 pin vqfp xc9572f +233vy xc9500f	PDF
TTL32 Abstract: TTL20 S124 TTL-20 TTL16 HW-133 diode b27 TTL41 TTL-30 TTL38 Contextual Info: ZONE P1 TTL0 D3 TTL3 A2 TTL6 A3 D2 D1 D0 S1-17 S1-20 S1-19 S1-18 TTL1 3/27/95 EWR FE 02 CHANGE PER DCN 7106 7/18/95 JWS ZZ 03 CHANGE PER DCN #7451 9/26/95 EWR ZZ P1 D4 B1 S1-22 S1-25 D6 TTL2 TTL4 B2 TTL5 C2 TTL7 B3 TTL8 C3 TTL10 B4 TTL11 C4 A5 TTL12 B5 TTL13	Original	s1-17 s1-20 s1-19 s1-18 +16s1-22 s1-25 ttl11 s1-24 s1-26 ttl10 ttl32 ttl20 s124 ttl-20 ttl16 hw-133 diode b27 ttl41 ttl-30 ttl38	PDF
PC84 84-Pin Plastic Leaded Chip Carrier Abstract: XC9572 PC84 PC84 XC9500 XC9572 PC84 84-Pin Plastic Leaded Chip Carrier PLCC Contextual Info:  XC9572 In-System Programmable CPLD March, 1997 Version 1.1 Product Specification Features Description • 7.5 ns pin-to-pin logic delays on all pins • fCNT to 125 MHz • 72 macrocells with 1,600 usable gates • Up to 72 user I/O pins • 5 V in-system programmable (ISP)	Original	xc9572 36v18 84-pin pq100 +8100-pin tq100 xc9572f pc84 84-pin plastic leaded chip carrier xc9572 pc84 pc84 xc9500 pc84 84-pin plastic leaded chip carrier plcc	PDF