X4201 Search Results

Contextual Info: 3EIMIMUM C O R P O R A T I O N G X4201 Wideband, Monolithic 1x1 Video Crosspoint Switch DATA SHEET FEATURES CIRCUIT DESCRIPTION • -3 dB bandwidth, 300 MHz with CL = 0 pF T h e G X 4 2 0 1 is a w id e b a n d 1x1 v id e o c ro s s p o in t im p le m e n te d

08/bup 3110 transistor

Contextual Info: GENNUM C O R P O R A T I O F M X4201 Wideband, Monolithic 1x1 Video Crosspoint Switch DATA SHEET FEATURES CIRCUIT DESCRIPTION • -3 dB bandwidth, 300 MHz with CL = 0 pF X4201 is a w ideb and 1x1 video cro sspoint im plem ented in bip o la r m onolithic tech nolog y. The d e vice is cha racte rized

CB4CLE

Abstract: cb4re CB8CLED cb8cle CB4CLED X74-160 x4202 CB16CE sr4cled 2 bit magnitude comparator using 2 xor gates
Contextual Info: ON LIN E R LIBRARIES G UI DE T ABL E OF CONT ENT S INDEX GO T O OT HER BOOKS 0 4 0 1410 Copyright 1993-1995 Xilinx Inc. All Rights Reserved. Contents Chapter 1 Xilinx Unified Libraries Overview .

LC1 D12 wiring diagram

Abstract: vhdl code for 8 bit ODD parity generator 74139 Dual 2 to 4 line decoder TTL XOR2 tig ac inverter circuit cd4rle LC1 D12 P7 CB4CLED sr4cled CB16CE
Contextual Info: Libraries Guide Xilinx Unified Libraries Selection Guide Design Elements ACC1 to BYPOSC Design Elements (CAPTURE_SPARTAN2 to DECODE64) Design Elements (F5MAP to FTSRLE) Design Elements (GCLK to KEEPER) Design Elements (LD to NOR16) Design Elements (OAND2 to OXOR2)

Contextual Info: G E IM IM U M C O R P O R A T I O INI GX42Ü1 Wideband, Monolithic 1x1 Video Crosspoint Switch DATA SHEET FEATURES C IR C U IT D E S C R IP T IO N • -3 dB bandwidth, 300 MHz with C L = 0 pF The X4201 is a w id e b a n d 1x1 video crosspoint im plem ented

attansic f1

Abstract: RC415M Attansic l1 RC415ME asus attansic lan schematic Attansic f2 PAD381 PT6319 d1106
Contextual Info: 5 4 3 F5R BLOCK DIAGRAM 2 1 CPU Yonah Single core Yonah Celeron D D Page 2 AGTL+ 133/166MHz LVDS Page 10 DDR2 533/667 RC415ME CRT Single Channel PCIE Page 11 DUAL DDR2 SO-DIMM Page 12,13,14 Page 5,6,7,8,9 PCIE X4 C C MINICARD SB600 Page 28 LAN 10/100 ATTANSIC L2

Attansic L1

Abstract: pr6239 RC415M RC415ME ICS951463AGLFT ASUS attansic f1 RTS5117 C3902 ICS951463
Contextual Info: 5 4 3 F5R BLOCK DIAGRAM 2 1 CPU Yonah Single core Yonah Celeron D D Page 2 AGTL+ 133/166MHz LVDS Page 10 DDR2 533/667 RC415ME CRT Single Channel PCIE Page 11 DUAL DDR2 SO-DIMM Page 12,13,14 Page 5,6,7,8,9 PCIE X4 C C MINICARD SB600 Page 28 LAN 10/100 ATTANSIC L2

CB4CLED

Abstract: x74_194 sr4cled CB16CE cd4re 2 bit magnitude comparator using 2 xor gates CB16CLE cd4rle 74139 Dual 2 to 4 line decoder TTL 7400
Contextual Info: ON LIN E R LIBRARIES G UI DE T ABL E OF CONT ENT S INDEX GO T O OT HER BOOKS 0 4 0 1410 Xilinx XC7000 and XC9000 Libraries Selection Guide Design Elements X2845 Index Libraries Guide Libraries Guide Printed in U.S.A. Libraries Guide R , XACT, XC2064, XC3090, XC4005, and XC-DS501 are registered trademarks of Xilinx. All XC-prefix

south bridge SIS 968

Abstract: C4833 U2401B R4727 Sis 968 C2237 C5902 C2238 SIS671DX C8208
Contextual Info: 5 4 3 Clock GEN D D FSB 533/667 LCD LVDS RGB DVI 1 Thermal CPU YONAH CRT 2 ATI M64-M PCIE 0-15 TMDS North Bridge Sis 671DX DDR2 SO-DIMM1 DDR2 SO-DIMM2 MuTIOL 1G TPM C 533/667 Mhz LPC Debug CON EC ITE8510E PATA South Bridge Sis 968 SATA C ODD HDD USB CCD PCI

CB4CLED

Abstract: vhdl code for 2-bit BCD adder CB4CLE TTL 7400 CC16CLE cb4ce code D24E XC400XL CB2CE CB16CE
Contextual Info: Libraries Guide Xilinx Unified Libraries Selection Guide Design Elements ACC1 to BYPOSC Design Elements (CAPTURE_VIRTEX to DECODE64) Design Elements (F5MAP to FTSRLE) Design Elements (GCLK to KEEPER) Design Elements (LD to NOR16) Design Elements (OAND2 to OXOR2)

X4201

Abstract: hp network analyzer connectors TLY1 TLY2
Contextual Info: X4201 Evaluation Board by lan flidpath, Senior Applications Engineer, Video and Broadcast Products Group APPLICATION NOTE INTRODUCTION In order to assist the design engineer evaluation board. INI As w ith any high frequency device, CND a good PCB layout is required for

RC415ME

Abstract: Attansic L1 TPC28T attansic f1 RC415M ICS951463 RTS5117 ATI RC415ME asus Attansic f2
Contextual Info: 5 4 3 F5R BLOCK DIAGRAM 2 1 CPU Yonah Single core Yonah Celeron D D Page 2 AGTL+ 133/166MHz LVDS Page 10 DDR2 533/667 RC415ME CRT Single Channel PCIE Page 11 DUAL DDR2 SO-DIMM Page 12,13,14 Page 5,6,7,8,9 PCIE X4 C C MINICARD SB600 Page 28 LAN 10/100 ATTANSIC L2

l6703

Abstract: d8107 u6701 JMB362 ICS9LPRS427 asus U2901 asus schematic diagram D15XD 51117
Contextual Info: 5 4 B A 2 1 Main Board D C 3 001. Page Ref. 002. Block Diagram 003. Schematic Information 004. CPU_Silverthorne 1 005. CPU_Silverthorne (2) 006. CPU_* 007. DIM_SO-DIMM 0 008. DIM_* 009. DIM_DDR2 Terminatin 010. SCH_Poulsbo_HOST 011. SCH_Poulsbo_DDR2

IT8752E

Abstract: aw-bt253 asus awbt253 J6001 SFI0402-050E330NP-LF J4210 L7405 CE1306 C7050
Contextual Info: 5 4 3 2 1 PROJECT N10I D D Revision 2008/04/24 Revision History SR R1.0 2008/01 Power States STATE SIGNAL Full ON SMB Signals Host Name Devices Address SLP_S3# SLP_S4# SLP_S5# +*VALWAYSP +*V +*VS Clocks HIGH HIGH HIGH ON ON ON ON S3 Suspend to RAM LOW HIGH

IC 74hc237

Contextual Info: HDTV 8x1 and 10x1 Modular Multiplexers GENNUM C O R P O R A T I O N APPLICATION NOTE by lan R idpaih. Senior A pp lication s Engineer, Video and Broadcast G roup INTRODUCTION High definition TV places additional requirements on crosspoint The m odular m ult;plexers d e scrib e d in this application note,