X24M000000S244 Search Results

yageo Phycomp 2238

Abstract: AD7796 2238 yageo Phycomp 2238 246 19863 yageo Phycomp 2238 867 15229 24LC64 AD7796BRUZ ADP3303 ADP3303ARZ-3 CY7C68013A-56LFXC
Contextual Info: Evaluation Board for the AD7796 16-Bit, Low Power Sigma-Delta ADC for Bridge Sensors EVAL-AD7796 channel of the AD7796 accepts analog input signals of ±VREF/128. With the update rate programmed to 4.17 Hz, the rms noise is 65 nV. Simultaneous 50 Hz/60 Hz rejection

ad7780

Abstract: load cell interface WITH ADC 8748 microcontroller yageo Phycomp 2238 ad7780 circuit Amplifier loadcell loadcell amplifier AD7780BRZ 8748 CY7C68013
Contextual Info: Evaluation Board User Guide UG-078 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluation Board for the AD7780 24-Bit, Pin-Programmable, Low Power, Sigma-Delta ADC on-chip digital filter. The analog input channel of the AD7780

7039d

Contextual Info: Wide Dynamic Range, High Speed, Digitally Controlled VGA ADL5202 Data Sheet FUNCTIONAL BLOCK DIAGRAM Dual independent, digitally controlled VGAs −11.5 dB to +20 dB gain range 0.5 dB ± 0.1 dB step size 150 Ω differential input and output 7.5 dB noise figure at maximum gain

Contextual Info: FEATURES −11.5 dB to +20 dB gain range 0.5 dB ± 0.1 dB step size 150 Ω differential input and output 7.5 dB noise figure at maximum gain OIP3 > 50 dBm at 200 MHz −3 dB upper frequency bandwidth of 700 MHz Multiple control interface options Parallel 6-bit control interface with latch

Contextual Info: FUNCTIONAL BLOCK DIAGRAM FEATURES Matched pair of programmable filters and VGAs Continuous gain control range: −5 dB to +45 dB 6-pole filter 1 MHz to 30 MHz in 1 MHz steps, 0.5 dB corner frequency SPI programmable 6 dB front-end gain step IMD3: >55 dBc for 1.5 V p-p composite output

TBD0402

Contextual Info: Wide Dynamic Range, High Speed, Digitally Controlled VGA ADL5201 FEATURES FUNCTIONAL BLOCK DIAGRAM −11.5 dB to +20 dB gain range 0.5 dB ± 0.1 dB step size 150 Ω differential input and output 7.5 dB noise figure at maximum gain OIP3 > 50 dBm at 200 MHz

VCO940ME03

Contextual Info: Evaluation Board User Guide UG-123 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluation Board for Fractional-N PLL Frequency Synthesizer FEATURES 5.8 GHz on board. The evaluation board is set up for a 10 MHz

223886715129

Abstract: 223878615649 232270296001 RC0603FR-0710KL X24M000000S244 AD779x ADP3330ARZ AD7170, 12-Bit Low Power Sigma-Delta ADC 1241050-3 BMB2A0300AN1
Contextual Info: Evaluation Board User Guide UG-080 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluation Board for the AD7170 12-Bit, Low Power Sigma-Delta ADC which the device consumes 5 A, thus increasing the battery life

Contextual Info: Evaluation Board for the AD7793 24-Bit, Low Power Sigma-Delta ADC 3 Channels EVAL-AD7793 With a gain of 64 and the update rate programmed to 16.7 Hz, the rms noise is 85 nV. Simultaneous 50 Hz/60 Hz rejection is available at this data update rate also. FEATURES

Contextual Info: FEATURES Dual independent, digitally controlled VGAs −11.5 dB to +20 dB gain range 0.5 dB ± 0.1 dB step size 150 Ω differential input and output 7.5 dB noise figure at maximum gain OIP3 > 50 dBm at 200 MHz −3 dB upper frequency bandwidth of 700 MHz Multiple control interface options

Phycomp 2238-586-15636

Abstract: phycomp 232270296001 DL4001TP ADP3330ARZ RC0603FR-07100RL Kingbright display RC0603FR-0710KL PHYCOMP 2255-206-13672 AD779x 2238-586-1563
Contextual Info: Evaluation Board User Guide UG-081 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluation Board for the AD7171 16-Bit, Low Power Sigma-Delta ADC down mode in which the device consumes 5 A, thus increasing

ADRF6510

Contextual Info: FEATURES Matched pair of programmable filters and VGAs Continuous gain control range: −5 dB to +45 dB 6-pole filter 1 MHz to 30 MHz in 1 MHz steps, 0.5 dB corner frequency SPI programmable 6 dB front-end gain step IMD3: >55 dBc for 1.5 V p-p composite output

CM105X7R104K16AT

Abstract: 2238 yageo AD7795 Meggitt Sigma PLC Communication cables pin diagram 06035A101JAT2A multicomp chip resistor 24LC64 AD7795BRUZ ADP3303
Contextual Info: Evaluation Board for the AD7795 16-Bit, Low Power Sigma-Delta ADC 6 Channels EVAL-AD7795 processed by an on-chip digital filter. The analog input channel of the AD7795 accepts analog input signals of ±VREF/gain, with gain equal to 1 to 128. With a gain of 64 and the update rate

BNC to usb schematic

Abstract: AD7798 223824619863 24LC64 DL4001 ADP3303ARZ-3 CY7C68013A-56LFXC X24M000000S244 AD7798BRUZ ADP3303
Contextual Info: Evaluation Board for the AD7798 16-Bit, Low Power Sigma-Delta ADC 3 Channels EVAL-AD7798 analog input channel of the AD7798 accepts analog input signals of ±VREF/gain, with a gain in the range of 1 to 128. When the gain is 64 and the update rate is programmed to 16.7 Hz, the

Contextual Info: Wide Dynamic Range, High Speed, Digitally Controlled VGA ADL5201 FEATURES FUNCTIONAL BLOCK DIAGRAM −11.5 dB to +20 dB gain range 0.5 dB ± 0.1 dB step size 150 Ω differential input and output 7.5 dB noise figure at maximum gain OIP3 > 50 dBm at 200 MHz

Contextual Info: FEATURES Dual independent, digitally controlled VGAs −11.5 dB to +20 dB gain range 0.5 dB ± 0.1 dB step size 150 Ω differential input and output 7.5 dB noise figure at maximum gain OIP3 > 50 dBm at 200 MHz −3 dB upper frequency bandwidth of 700 MHz

TBD0402

Abstract: c7343 CAPACITOR adl5201 D0938
Contextual Info: FEATURES −11.5 dB to +20 dB gain range 0.5 dB ± 0.1 dB step size 150 Ω differential input and output 7.5 dB noise figure at maximum gain OIP3 > 50 dBm at 200 MHz −3 dB upper frequency bandwidth of 700 MHz Multiple control interface options Parallel 6-bit control interface with latch

ad7794 evaluation

Abstract: AEL Crystals AD7794 24LC64 EVAL-AD7794 ad7794 schematics AD7794BRUZ ADP3303 ADP3303ARZ-3 CY7C68013A-56LFXC
Contextual Info: Evaluation Board for the AD7794 24-Bit, Low Power Sigma-Delta ADC 6 Channels EVAL-AD7794 processed by an on-chip digital filter. The analog input channel of the AD7794 accepts analog input signals of ±VREF/gain, with gain equal to 1 to 128. With a gain of 64 and the update rate

yageo Phycomp 2238

Abstract: 8749 MICROCONTROLLER ad7781 232270296001 2238 yageo LK15 KP-2012SGC loadcell amplifier tare ADP3303
Contextual Info: Evaluation Board User Guide UG-079 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluation Board for the AD7781 20-Bit, Pin-Programmable, Low Power, Sigma-Delta ADC an on-chip digital filter. The analog input channel of the

AD7792BRUZ

Abstract: AD7792 meggitt resistors ROHS Multicomp MCC 11 24LC64 ADP3303 ADP3303ARZ-3 CY7C68013A-56LFXC QTLP630C-4 X24M000000S244
Contextual Info: Evaluation Board for the AD7792 16-Bit, Low Power Sigma-Delta ADC 3 Channels EVAL-AD7792 With a gain of 64 and the update rate programmed to 16.7 Hz, the rms noise is 85 nV. Simultaneous 50 Hz/60 Hz rejection is available at this data update rate also. FEATURES

AD7799

Abstract: AEL Crystals CY7C68013 CTB5000/2 CY7C68013A-56LFXC mathcad 24LC64 AD7799BRUZ ADP3303 ADP3303ARZ-3
Contextual Info: Evaluation Board for the AD7799 24-Bit, Low Power Sigma-Delta ADC 3 Channels EVAL-AD7799 analog input channel of the AD7799 accepts analog input signals of ±VREF/gain, with a gain in the range of 1 to 128. When the gain is 64 and the update rate is programmed to 16.7 Hz, the

yageo Phycomp 2238

Abstract: yageo Phycomp 2238 867 15229 CM105X7R104K16AT 2238 yageo 56579-0576 Phycomp 2238 246 19863 CY7C68013A-56LFXC yageo Phycomp 2238 867 24LC64 AD7797
Contextual Info: Evaluation Board for the AD7797 24-Bit, Low Power Sigma-Delta ADC for Bridge Sensors EVAL-AD7797 channel of the AD7797 accepts analog input signals of ±VREF/128. With the update rate programmed to 4.17 Hz, the rms noise is 65 nV. Simultaneous 50 Hz/60 Hz rejection

AD9639

Abstract: ADRF6510 22PF ADL5387 ETC1-1-13 ADRF6510-EVALZ
Contextual Info: 30 MHz Dual Programmable Filters and Variable Gain Amplifiers ADRF6510 Matched pair of programmable filters and VGAs Continuous gain control range: −5 dB to +45 dB 6-pole filter 1 MHz to 30 MHz in 1 MHz steps, 0.5 dB corner frequency SPI programmable 6 dB front-end gain step

Contextual Info: Wide Dynamic Range, High Speed, Digitally Controlled VGA ADL5202 Data Sheet FUNCTIONAL BLOCK DIAGRAM Dual independent, digitally controlled VGAs −11.5 dB to +20 dB gain range 0.5 dB ± 0.1 dB step size 150 Ω differential input and output 7.5 dB noise figure at maximum gain