WW38 Search Results
WW38 Price and Stock
Bliley Technologies Inc BR2W-W38.51MHZ |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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BR2W-W38.51MHZ | 66 |
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WW38 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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FREESCALE Lot Code IdentificationContextual Info: Freescale Semiconductor, Inc. Order number: MC100ES6139 Rev 1, 06/2004 TECHNICAL DATA 3.3 V ECL/PECL/HSTL/LVDS ÷2/4, ÷4/5/6 Clock Generation Chip The MC100ES6139 is a low skew ÷2/4, ÷4/5/6 clock generation chip designed explicitly for low skew clock generation applications. The internal |
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mc100es6139freescale lot code identification | |
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Contextual Info: Freescale Semiconductor, Inc. Order number: MC100ES6039 Rev 1, 06/2004 TECHNICAL DATA 3.3 V ECL/PECL/HSTL/LVDS ÷2/4, ÷4/6 Clock Generation Chip The MC100ES6039 is a low skew ÷2/4, ÷4/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are |
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mc100es6039 | |
MC100ES6014
Abstract: MC100ES6014DT MC100ES6014DTR2 TSSOP-20
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mc100es6014es6014mc100es6014dtmc100es6014dtr2+1 | |
marking code motorola ic
Abstract: motorola marking code 8 lead soic package MC100ES6139 MC100ES6139DT MC100ES6139DTR2 MC100ES6139DW MC100ES6139DWR2 TSSOP-20 motorola marking code 14 lead soic package ww29
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mc100es6139/dmc100es6139marking code motorola icmotorola marking code 8 lead soic package+7 | |
MC100ES6011
Abstract: MC100ES6011D MC100ES6011DR2 WW39
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mc100es6011es6011100esmc100es6011d+2 | |
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Contextual Info: ESD6100 2 Channel Very Low Capacitance ESD Protection Device in CSP Product Description http://onsemi.com The ESD6100 is a 4−bump very low capacitance ESD protection device in 0.4 mm CSP form factor. It is fully compliant with IEC 61000−4−2. The ESD6100 is RoHS II compliant. |
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esd6100567cbesd6100/d | |
motorola marking code 8 lead soic package
Abstract: ALPHA YEAR DATE CODE Q575 WW47
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mc100es6039motorola marking code 8 lead soic packagealpha year date codeq575+1 | |
WW36
Abstract: WW39
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mc100es6014/dmc100es6014es6014ww36+1 | |
WW26Contextual Info: Freescale Semiconductor, Inc. Order number: MC100ES6039 Rev 1, 06/2004 TECHNICAL DATA 3.3 V ECL/PECL/HSTL/LVDS ÷2/4, ÷4/6 Clock Generation Chip The MC100ES6039 is a low skew ÷2/4, ÷4/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are |
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mc100es6039ww26 | |
tt 3043
Abstract: pericom sot23-6 PT7C5021KD PT7C5021AD sot23-6 marking code cd PT0221 PT7C5021Bx PT7C5021ACTA PT7C5021ABTA BX SOT23-6
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pt7c5021pt7c5021axpt0221tt 3043+8 | |
tracecode
Abstract: ww38 MC100ES6056 MC100ES6056DT MC100ES6056DTR2 MC100ES6056DW MC100ES6056DWR2 TSSOP-20 motorola marking code 8 lead soic package marking code motorola ic
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mc100es6056tracecodeww38mc100es6056dt+6 | |
WW26
Abstract: IDT 20-SOIC package marking Marking D1B PART MARKING D0B FREESCALE marking code 8 soic IDT SO-20 package marking WW39
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mc100es6056199707558gww26idt 20-soic package marking+5 | |
semi catalog
Abstract: j510 Motorola transistor smd marking codes rf choke cross comparison books TTL catalog IC Data-book MPC930 MPC9449 MPC951 MPC952
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dl207xx/2004semi catalogj510+8 | |
ww36
Abstract: ww38 WW47
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cm6100567cbcm6100/dww36+2 | |
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Contextual Info: Freescale Semiconductor, Inc. Order number: MC100ES6014 Rev 2, 5/2004 TECHNICAL DATA 2.5V / 3.3V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver The MC100ES6014 is a low skew 1-to-5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. |
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mc100es6014es6014 | |
WW26
Abstract: FREESCALE marking code 8 soic ww36 MARKING code 1405
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mc100es6011es6011100es32-lead+4 | |
FREESCALE marking code 8 soic
Abstract: M6011
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mc100es6011/dmc100es6011lvep11es6011+3 | |
ww36
Abstract: IDT 20-SOIC package marking
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mc100es6139199707558gww36idt 20-soic package marking | |
IDT 20-SOIC package markingContextual Info: Freescale Semiconductor, Inc. Order number: MC100ES6039 Rev 1, 06/2004 DATA SHEET TECHNICAL DATA 3.3 V ECL/PECL/HSTL/LVDS ÷2/4, ÷4/6 Generation Chip 3.3Clock V ECL/PECL/HSTL/LVDS ÷2/4, The MC100ES6039 is a low skew ÷2/4, ÷4/6 clock generation chip designed |
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mc100es6039199707558gidt 20-soic package marking | |
ES603
Abstract: MC100ES6039DW MC100ES6039 MC100ES6039DWR2 motorola marking code 8 lead soic package
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mc100es6039es603mc100es6039dwmc100es6039dwr2+1 | |
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Contextual Info: MOTOROLA Order Number: MC100ES6139/D Rev 0, 05/2003 SEMICONDUCTOR TECHNICAL DATA Preliminary Information 2.5V/3.3VĄ ECL/PECL/HSTL/LVDS ÷2/4, ÷4/5/6 Clock Generation Chip 7 The MC100ES6139 is a low skew ÷2/4, ÷4/5/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output |
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mc100es6139/dmc100es6139 | |
WW47Contextual Info: MOTOROLA Order number: MC100ES6056 Rev 3, 5/2004 SEMICONDUCTOR TECHNICAL DATA 2.5V / 3.3V ECL/PECL/LVDS Dual Differential 2:1 Multiplexer The MC100ES6056 is a dual, fully differential 2:1 multiplexer. The differential data path makes the device ideal for multiplexing low skew clock or |
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mc100es6056ww47 | |
ww36
Abstract: xabr ww47
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mc100es6011es6011100es32-lead+3 | |
MC100ES6014Contextual Info: Freescale Semiconductor, Inc. Order number: MC100ES6014 2, 5/2004 DATARev SHEET TECHNICAL DATA 2.5V / 3.3V 1:5 Differential ECL/PECL/HSTL/LVDS Clock Driver 2.5V / 3.3V 1:5 Differential The MC100ES6014 is a low skew 1-to-5 differential driver, designed with |
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mc100es6014es6014199707558g | |